diff for duplicates of <20170426113651.GI21744@arm.com> diff --git a/a/1.txt b/N1/1.txt index fb1ddf1..ad4d04d 100644 --- a/a/1.txt +++ b/N1/1.txt @@ -1,9 +1,9 @@ On Wed, Apr 26, 2017 at 04:13:29PM +0530, Sunil Kovvuri wrote: -> On Wed, Apr 26, 2017 at 3:31 PM, Will Deacon <will.deacon-5wv7dgnIgG8@public.gmane.org> wrote: +> On Wed, Apr 26, 2017 at 3:31 PM, Will Deacon <will.deacon@arm.com> wrote: > > Hi Sunil, > > -> > On Tue, Apr 25, 2017 at 03:27:52PM +0530, sunil.kovvuri-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org wrote: -> >> From: Sunil Goutham <sgoutham-YGCgFSpz5w/QT0dZR+AlfA@public.gmane.org> +> > On Tue, Apr 25, 2017 at 03:27:52PM +0530, sunil.kovvuri at gmail.com wrote: +> >> From: Sunil Goutham <sgoutham@cavium.com> > >> > >> For software initiated address translation, when domain type is > >> IOMMU_DOMAIN_IDENTITY i.e SMMU is bypassed, mimic HW behavior @@ -12,7 +12,7 @@ On Wed, Apr 26, 2017 at 04:13:29PM +0530, Sunil Kovvuri wrote: > >> This patch is an extension to Will Deacon's patchset > >> "Implement SMMU passthrough using the default domain". > >> -> >> Signed-off-by: Sunil Goutham <sgoutham-YGCgFSpz5w/QT0dZR+AlfA@public.gmane.org> +> >> Signed-off-by: Sunil Goutham <sgoutham@cavium.com> > >> --- > >> > >> V2 @@ -20,7 +20,7 @@ On Wed, Apr 26, 2017 at 04:13:29PM +0530, Sunil Kovvuri wrote: > > > > This follows what the AMD driver does, so: > > -> > Acked-by: Will Deacon <will.deacon-5wv7dgnIgG8@public.gmane.org> +> > Acked-by: Will Deacon <will.deacon@arm.com> > > Thanks, > diff --git a/a/content_digest b/N1/content_digest index e7a3bb6..8dc8d7c 100644 --- a/a/content_digest +++ b/N1/content_digest @@ -1,24 +1,18 @@ "ref\01493114272-30093-1-git-send-email-sunil.kovvuri@gmail.com\0" "ref\020170426100150.GE21744@arm.com\0" "ref\0CA+sq2Ce2UVi04VtD4KLDsNk2baN1kq_vN2KOrEt9a_cB0gJ0vw@mail.gmail.com\0" - "ref\0CA+sq2Ce2UVi04VtD4KLDsNk2baN1kq_vN2KOrEt9a_cB0gJ0vw-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org\0" - "From\0Will Deacon <will.deacon-5wv7dgnIgG8@public.gmane.org>\0" - "Subject\0Re: [PATCH v2] iommu/arm-smmu: Return IOVA in iova_to_phys when SMMU is bypassed\0" + "From\0will.deacon@arm.com (Will Deacon)\0" + "Subject\0[PATCH v2] iommu/arm-smmu: Return IOVA in iova_to_phys when SMMU is bypassed\0" "Date\0Wed, 26 Apr 2017 12:36:52 +0100\0" - "To\0Sunil Kovvuri <sunil.kovvuri-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>\0" - "Cc\0iommu-cunTk1MwBs9QetFLy7KEm3xJsTq8ys+cHZ5vskTnxNA@public.gmane.org" - LKML <linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org> - robert.richter-YGCgFSpz5w/QT0dZR+AlfA@public.gmane.org - Sunil Goutham <sgoutham-YGCgFSpz5w/QT0dZR+AlfA@public.gmane.org> - " LAKML <linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org>\0" + "To\0linux-arm-kernel@lists.infradead.org\0" "\00:1\0" "b\0" "On Wed, Apr 26, 2017 at 04:13:29PM +0530, Sunil Kovvuri wrote:\n" - "> On Wed, Apr 26, 2017 at 3:31 PM, Will Deacon <will.deacon-5wv7dgnIgG8@public.gmane.org> wrote:\n" + "> On Wed, Apr 26, 2017 at 3:31 PM, Will Deacon <will.deacon@arm.com> wrote:\n" "> > Hi Sunil,\n" "> >\n" - "> > On Tue, Apr 25, 2017 at 03:27:52PM +0530, sunil.kovvuri-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org wrote:\n" - "> >> From: Sunil Goutham <sgoutham-YGCgFSpz5w/QT0dZR+AlfA@public.gmane.org>\n" + "> > On Tue, Apr 25, 2017 at 03:27:52PM +0530, sunil.kovvuri at gmail.com wrote:\n" + "> >> From: Sunil Goutham <sgoutham@cavium.com>\n" "> >>\n" "> >> For software initiated address translation, when domain type is\n" "> >> IOMMU_DOMAIN_IDENTITY i.e SMMU is bypassed, mimic HW behavior\n" @@ -27,7 +21,7 @@ "> >> This patch is an extension to Will Deacon's patchset\n" "> >> \"Implement SMMU passthrough using the default domain\".\n" "> >>\n" - "> >> Signed-off-by: Sunil Goutham <sgoutham-YGCgFSpz5w/QT0dZR+AlfA@public.gmane.org>\n" + "> >> Signed-off-by: Sunil Goutham <sgoutham@cavium.com>\n" "> >> ---\n" "> >>\n" "> >> V2\n" @@ -35,7 +29,7 @@ "> >\n" "> > This follows what the AMD driver does, so:\n" "> >\n" - "> > Acked-by: Will Deacon <will.deacon-5wv7dgnIgG8@public.gmane.org>\n" + "> > Acked-by: Will Deacon <will.deacon@arm.com>\n" "> \n" "> Thanks,\n" "> \n" @@ -106,4 +100,4 @@ "\n" Will -3c7a091134a54f0257295150b5b364572b204533dea9cb02bf376207332c731d +5f23f06ae9ecc4cce67f654f34cbee28c32e4f5092cedffa0a60a27ad7322e72
diff --git a/a/1.txt b/N2/1.txt index fb1ddf1..a059096 100644 --- a/a/1.txt +++ b/N2/1.txt @@ -1,9 +1,9 @@ On Wed, Apr 26, 2017 at 04:13:29PM +0530, Sunil Kovvuri wrote: -> On Wed, Apr 26, 2017 at 3:31 PM, Will Deacon <will.deacon-5wv7dgnIgG8@public.gmane.org> wrote: +> On Wed, Apr 26, 2017 at 3:31 PM, Will Deacon <will.deacon@arm.com> wrote: > > Hi Sunil, > > -> > On Tue, Apr 25, 2017 at 03:27:52PM +0530, sunil.kovvuri-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org wrote: -> >> From: Sunil Goutham <sgoutham-YGCgFSpz5w/QT0dZR+AlfA@public.gmane.org> +> > On Tue, Apr 25, 2017 at 03:27:52PM +0530, sunil.kovvuri@gmail.com wrote: +> >> From: Sunil Goutham <sgoutham@cavium.com> > >> > >> For software initiated address translation, when domain type is > >> IOMMU_DOMAIN_IDENTITY i.e SMMU is bypassed, mimic HW behavior @@ -12,7 +12,7 @@ On Wed, Apr 26, 2017 at 04:13:29PM +0530, Sunil Kovvuri wrote: > >> This patch is an extension to Will Deacon's patchset > >> "Implement SMMU passthrough using the default domain". > >> -> >> Signed-off-by: Sunil Goutham <sgoutham-YGCgFSpz5w/QT0dZR+AlfA@public.gmane.org> +> >> Signed-off-by: Sunil Goutham <sgoutham@cavium.com> > >> --- > >> > >> V2 @@ -20,7 +20,7 @@ On Wed, Apr 26, 2017 at 04:13:29PM +0530, Sunil Kovvuri wrote: > > > > This follows what the AMD driver does, so: > > -> > Acked-by: Will Deacon <will.deacon-5wv7dgnIgG8@public.gmane.org> +> > Acked-by: Will Deacon <will.deacon@arm.com> > > Thanks, > diff --git a/a/content_digest b/N2/content_digest index e7a3bb6..6934118 100644 --- a/a/content_digest +++ b/N2/content_digest @@ -1,24 +1,24 @@ "ref\01493114272-30093-1-git-send-email-sunil.kovvuri@gmail.com\0" "ref\020170426100150.GE21744@arm.com\0" "ref\0CA+sq2Ce2UVi04VtD4KLDsNk2baN1kq_vN2KOrEt9a_cB0gJ0vw@mail.gmail.com\0" - "ref\0CA+sq2Ce2UVi04VtD4KLDsNk2baN1kq_vN2KOrEt9a_cB0gJ0vw-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org\0" - "From\0Will Deacon <will.deacon-5wv7dgnIgG8@public.gmane.org>\0" + "From\0Will Deacon <will.deacon@arm.com>\0" "Subject\0Re: [PATCH v2] iommu/arm-smmu: Return IOVA in iova_to_phys when SMMU is bypassed\0" "Date\0Wed, 26 Apr 2017 12:36:52 +0100\0" - "To\0Sunil Kovvuri <sunil.kovvuri-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>\0" - "Cc\0iommu-cunTk1MwBs9QetFLy7KEm3xJsTq8ys+cHZ5vskTnxNA@public.gmane.org" - LKML <linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org> - robert.richter-YGCgFSpz5w/QT0dZR+AlfA@public.gmane.org - Sunil Goutham <sgoutham-YGCgFSpz5w/QT0dZR+AlfA@public.gmane.org> - " LAKML <linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org>\0" + "To\0Sunil Kovvuri <sunil.kovvuri@gmail.com>\0" + "Cc\0Joerg Roedel <joro@8bytes.org>" + iommu@lists.linux-foundation.org + LAKML <linux-arm-kernel@lists.infradead.org> + LKML <linux-kernel@vger.kernel.org> + robert.richter@cavium.com + " Sunil Goutham <sgoutham@cavium.com>\0" "\00:1\0" "b\0" "On Wed, Apr 26, 2017 at 04:13:29PM +0530, Sunil Kovvuri wrote:\n" - "> On Wed, Apr 26, 2017 at 3:31 PM, Will Deacon <will.deacon-5wv7dgnIgG8@public.gmane.org> wrote:\n" + "> On Wed, Apr 26, 2017 at 3:31 PM, Will Deacon <will.deacon@arm.com> wrote:\n" "> > Hi Sunil,\n" "> >\n" - "> > On Tue, Apr 25, 2017 at 03:27:52PM +0530, sunil.kovvuri-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org wrote:\n" - "> >> From: Sunil Goutham <sgoutham-YGCgFSpz5w/QT0dZR+AlfA@public.gmane.org>\n" + "> > On Tue, Apr 25, 2017 at 03:27:52PM +0530, sunil.kovvuri@gmail.com wrote:\n" + "> >> From: Sunil Goutham <sgoutham@cavium.com>\n" "> >>\n" "> >> For software initiated address translation, when domain type is\n" "> >> IOMMU_DOMAIN_IDENTITY i.e SMMU is bypassed, mimic HW behavior\n" @@ -27,7 +27,7 @@ "> >> This patch is an extension to Will Deacon's patchset\n" "> >> \"Implement SMMU passthrough using the default domain\".\n" "> >>\n" - "> >> Signed-off-by: Sunil Goutham <sgoutham-YGCgFSpz5w/QT0dZR+AlfA@public.gmane.org>\n" + "> >> Signed-off-by: Sunil Goutham <sgoutham@cavium.com>\n" "> >> ---\n" "> >>\n" "> >> V2\n" @@ -35,7 +35,7 @@ "> >\n" "> > This follows what the AMD driver does, so:\n" "> >\n" - "> > Acked-by: Will Deacon <will.deacon-5wv7dgnIgG8@public.gmane.org>\n" + "> > Acked-by: Will Deacon <will.deacon@arm.com>\n" "> \n" "> Thanks,\n" "> \n" @@ -106,4 +106,4 @@ "\n" Will -3c7a091134a54f0257295150b5b364572b204533dea9cb02bf376207332c731d +1eeeddc0f603fe810875660262cd0e68d01109f9e5db6ca84e9a9d80db8f0e8a
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