All of lore.kernel.org
 help / color / mirror / Atom feed
From: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
To: "Lee, Shawn C" <shawn.c.lee@intel.com>
Cc: Cooper Chiou <cooper.chiou@intel.com>,
	Jim Bride <jim.bride@intel.com>,
	Jani Nikula <jani.nikula@intel.com>,
	intel-gfx@lists.freedesktop.org,
	Rodrigo Vivi <rodrigo.vivi@intel.com>,
	Ryan Lin <ryan.lin@intel.com>
Subject: Re: [PATCH] drm/i915/edp: Read link status after exit PSR
Date: Thu, 27 Apr 2017 17:38:31 +0300	[thread overview]
Message-ID: <20170427143831.GN30290@intel.com> (raw)
In-Reply-To: <1493303722-17024-1-git-send-email-shawn.c.lee@intel.com>

On Thu, Apr 27, 2017 at 10:35:22PM +0800, Lee, Shawn C wrote:
> From: "Lee, Shawn C" <shawn.c.lee@intel.com>
> 
> Display driver read DPCD register 0x202, 0x203 and 0x204 to identify
> eDP sink status. If PSR exit is ongoing at eDP sink, and eDP source
> read these registers at the same time. Panel will report EQ & symbol
> lock not done. It will cause panel display flicking.
> So driver have to make sure PSR already exit before read link status.

And what exactly guarantees that it will exit PSR eventually?

> 
> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=99639
> TEST=Reboot DUT and no flicking on local display at login screen
> 
> Cc: Cooper Chiou <cooper.chiou@intel.com>
> Cc: Jani Nikula <jani.nikula@intel.com>
> Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
> Cc: Jim Bride <jim.bride@intel.com>
> Cc: Ryan Lin <ryan.lin@intel.com>
> 
> Signed-off-by: Shawn Lee <shawn.c.lee@intel.com>
> ---
>  drivers/gpu/drm/i915/intel_dp.c |   34 +++++++++++++++++++++++++++++-----
>  1 file changed, 29 insertions(+), 5 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
> index 08834f74d396..cc431337b2dc 100644
> --- a/drivers/gpu/drm/i915/intel_dp.c
> +++ b/drivers/gpu/drm/i915/intel_dp.c
> @@ -4252,19 +4252,35 @@ static void intel_dp_handle_test_request(struct intel_dp *intel_dp)
>  }
>  
>  static void
> +intel_edp_wait_PSR_exit(struct intel_dp *intel_dp)
> +{
> +	struct drm_device *dev = intel_dp_to_dev(intel_dp);
> +	struct drm_i915_private *dev_priv = dev->dev_private;
> +	u32 srd_status, count = 100;
> +
> +	while (count--) {
> +		srd_status = I915_READ(EDP_PSR_STATUS_CTL);
> +
> +		if ((srd_status & EDP_PSR_STATUS_SENDING_TP1) ||
> +		    (srd_status & EDP_PSR_STATUS_SENDING_TP2_TP3) ||
> +		    (srd_status & EDP_PSR_STATUS_SENDING_IDLE) ||
> +		    (srd_status & EDP_PSR_STATUS_AUX_SENDING)) {
> +			usleep_range(100, 150);
> +		} else
> +			return;
> +	}
> +}
> +
> +static void
>  intel_dp_check_link_status(struct intel_dp *intel_dp)
>  {
>  	struct intel_encoder *intel_encoder = &dp_to_dig_port(intel_dp)->base;
>  	struct drm_device *dev = intel_dp_to_dev(intel_dp);
> +	struct drm_i915_private *dev_priv = dev->dev_private;
>  	u8 link_status[DP_LINK_STATUS_SIZE];
>  
>  	WARN_ON(!drm_modeset_is_locked(&dev->mode_config.connection_mutex));
>  
> -	if (!intel_dp_get_link_status(intel_dp, link_status)) {
> -		DRM_ERROR("Failed to get link status\n");
> -		return;
> -	}
> -
>  	if (!intel_encoder->base.crtc)
>  		return;
>  
> @@ -4278,6 +4294,14 @@ static void intel_dp_handle_test_request(struct intel_dp *intel_dp)
>  	if (!intel_dp_link_params_valid(intel_dp))
>  		return;
>  
> +	if (is_edp(intel_dp) && dev_priv->psr.enabled)
> +		intel_edp_wait_PSR_exit(intel_dp);
> +
> +	if (!intel_dp_get_link_status(intel_dp, link_status)) {
> +		DRM_ERROR("Failed to get link status\n");
> +		return;
> +	}
> +
>  	/* Retrain if Channel EQ or CR not ok */
>  	if (!drm_dp_channel_eq_ok(link_status, intel_dp->lane_count)) {
>  		DRM_DEBUG_KMS("%s: channel EQ not ok, retraining\n",
> -- 
> 1.7.9.5
> 
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx

-- 
Ville Syrjälä
Intel OTC
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

  parent reply	other threads:[~2017-04-27 14:38 UTC|newest]

Thread overview: 13+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-04-27 14:35 [PATCH] drm/i915/edp: Read link status after exit PSR Lee, Shawn C
2017-04-27 14:16 ` Chris Wilson
2017-04-27 14:38 ` Ville Syrjälä [this message]
2017-04-28  3:08   ` Lee, Shawn C
2017-04-28 11:11     ` Ville Syrjälä
2017-05-03  7:06       ` Lee, Shawn C
2017-04-27 14:46 ` ✓ Fi.CI.BAT: success for " Patchwork
2017-04-28  9:58 ` [PATCH v2] drm/i915/edp: Read link status after exit link training Lee, Shawn C
2017-04-28 11:50   ` Tvrtko Ursulin
2017-05-03  7:42     ` Lee, Shawn C
2017-04-28 11:19 ` ✓ Fi.CI.BAT: success for drm/i915/edp: Read link status after exit PSR (rev2) Patchwork
2017-05-05  6:38 ` ✓ Fi.CI.BAT: success for drm/i915/edp: Read link status after exit PSR (rev3) Patchwork
2017-05-05  6:50 ` [PATCH v3] drm/i915/edp: Read link status after exit link training Lee, Shawn C

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20170427143831.GN30290@intel.com \
    --to=ville.syrjala@linux.intel.com \
    --cc=cooper.chiou@intel.com \
    --cc=intel-gfx@lists.freedesktop.org \
    --cc=jani.nikula@intel.com \
    --cc=jim.bride@intel.com \
    --cc=rodrigo.vivi@intel.com \
    --cc=ryan.lin@intel.com \
    --cc=shawn.c.lee@intel.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.