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From: Adrien Mazarguil <adrien.mazarguil@6wind.com>
To: Shahaf Shuler <shahafs@mellanox.com>
Cc: nelio.laranjeiro@6wind.com, dev@dpdk.org
Subject: Re: [PATCH] net/mlx5: fix Tx max inline with TSO
Date: Wed, 3 May 2017 09:32:38 +0200	[thread overview]
Message-ID: <20170503073237.GJ16218@6wind.com> (raw)
In-Reply-To: <20170503065535.188899-1-shahafs@mellanox.com>

On Wed, May 03, 2017 at 09:55:35AM +0300, Shahaf Shuler wrote:
> When TSO is enabled, Verbs layer aggregates the TSO
> inline size with the txq inline size for the Tx creation,
> while the PMD takes the maximum among them.
> 
> Fixing it by adjusting the max inline parameter before
> passing to to Verbs.
> 
> Fixes: 3f13f8c23a7c ("net/mlx5: support hardware TSO")
> 
> Signed-off-by: Shahaf Shuler <shahafs@mellanox.com>
> Acked-by: Yongseok Koh <yskoh@mellanox.com>
> ---
>  drivers/net/mlx5/mlx5_txq.c | 17 +++++++++++++----
>  1 file changed, 13 insertions(+), 4 deletions(-)
> 
> diff --git a/drivers/net/mlx5/mlx5_txq.c b/drivers/net/mlx5/mlx5_txq.c
> index f80740a13..24bd8c615 100644
> --- a/drivers/net/mlx5/mlx5_txq.c
> +++ b/drivers/net/mlx5/mlx5_txq.c
> @@ -230,6 +230,9 @@ txq_ctrl_setup(struct rte_eth_dev *dev, struct txq_ctrl *txq_ctrl,
>  		struct ibv_exp_cq_attr cq_attr;
>  	} attr;
>  	unsigned int cqe_n;
> +	const unsigned int max_tso_inline = ((MLX5_MAX_TSO_HEADER +
> +					     (RTE_CACHE_LINE_SIZE - 1)) /
> +					      RTE_CACHE_LINE_SIZE);
>  	int ret = 0;
>  
>  	if (mlx5_getenv_int("MLX5_ENABLE_CQE_COMPRESSION")) {
> @@ -307,16 +310,22 @@ txq_ctrl_setup(struct rte_eth_dev *dev, struct txq_ctrl *txq_ctrl,
>  					  priv->inline_max_packet_sz) +
>  				  (RTE_CACHE_LINE_SIZE - 1)) /
>  				 RTE_CACHE_LINE_SIZE) * RTE_CACHE_LINE_SIZE;
> +		} else if (priv->tso) {
> +			int inline_diff = tmpl.txq.max_inline - max_tso_inline;
> +
> +			/* Adjust inline value as Verbs aggregates
> +			 * tso_inline and txq_inline fields.
> +			 */

Minor nit about this comment, the coding style should match the rest of the
file with "/*" alone on its own line.

> +			attr.init.cap.max_inline_data = inline_diff > 0 ?
> +							inline_diff *
> +							RTE_CACHE_LINE_SIZE :
> +							0;
>  		} else {
>  			attr.init.cap.max_inline_data =
>  				tmpl.txq.max_inline * RTE_CACHE_LINE_SIZE;
>  		}
>  	}
>  	if (priv->tso) {
> -		uint16_t max_tso_inline = ((MLX5_MAX_TSO_HEADER +
> -					   (RTE_CACHE_LINE_SIZE - 1)) /
> -					    RTE_CACHE_LINE_SIZE);
> -
>  		attr.init.max_tso_header =
>  			max_tso_inline * RTE_CACHE_LINE_SIZE;
>  		attr.init.comp_mask |= IBV_EXP_QP_INIT_ATTR_MAX_TSO_HEADER;
> -- 
> 2.12.0
> 

-- 
Adrien Mazarguil
6WIND

      parent reply	other threads:[~2017-05-03  7:32 UTC|newest]

Thread overview: 4+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-05-03  6:55 [PATCH] net/mlx5: fix Tx max inline with TSO Shahaf Shuler
2017-05-03  6:59 ` Nélio Laranjeiro
2017-05-05 15:44   ` Thomas Monjalon
2017-05-03  7:32 ` Adrien Mazarguil [this message]

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