diff for duplicates of <20170510053105.GA7576@virtx40> diff --git a/a/1.txt b/N1/1.txt index 4015858..e3c5895 100644 --- a/a/1.txt +++ b/N1/1.txt @@ -1,6 +1,6 @@ > On Tue May 09, 2017 at 02:02:58PM +0100, Robin Murphy wrote: > > On 09/05/17 12:45, Geetha sowjanya wrote: -> > > From: Linu Cherian <linu.cherian-YGCgFSpz5w/QT0dZR+AlfA@public.gmane.org> +> > > From: Linu Cherian <linu.cherian@cavium.com> > > > > > > Cavium ThunderX2 SMMU implementation doesn't support page 1 register space > > > and PAGE0_REGS_ONLY option is enabled as an errata workaround. @@ -12,8 +12,8 @@ > > > For this, arm_smmu_device_dt_probe/acpi_probe has been moved before > > > platform_get_resource call, so that SMMU options are set beforehand. > > > -> > > Signed-off-by: Linu Cherian <linu.cherian-YGCgFSpz5w/QT0dZR+AlfA@public.gmane.org> -> > > Signed-off-by: Geetha Sowjanya <geethasowjanya.akula-YGCgFSpz5w/QT0dZR+AlfA@public.gmane.org> +> > > Signed-off-by: Linu Cherian <linu.cherian@cavium.com> +> > > Signed-off-by: Geetha Sowjanya <geethasowjanya.akula@cavium.com> > > > --- > > > Documentation/arm64/silicon-errata.txt | 1 + > > > .../devicetree/bindings/iommu/arm,smmu-v3.txt | 6 ++ @@ -48,7 +48,7 @@ > > > + > > > ** Example > > > -> > > smmu@2b400000 { +> > > smmu at 2b400000 { > > > diff --git a/drivers/iommu/arm-smmu-v3.c b/drivers/iommu/arm-smmu-v3.c > > > index 380969a..1e986a0 100644 > > > --- a/drivers/iommu/arm-smmu-v3.c diff --git a/a/content_digest b/N1/content_digest index 8a61507..d9b1c60 100644 --- a/a/content_digest +++ b/N1/content_digest @@ -2,29 +2,15 @@ "ref\01494330314-30179-4-git-send-email-gakula@caviumnetworks.com\0" "ref\0bd0b9567-ccc5-8bf2-b113-d0f7a1ab2ed2@arm.com\0" "ref\020170509134856.GA1090@virtx40\0" - "From\0Linu Cherian <linu.cherian-YGCgFSpz5w/QT0dZR+AlfA@public.gmane.org>\0" - "Subject\0Re: [v4 3/4] iommu/arm-smmu-v3: Add workaround for Cavium ThunderX2 erratum #74\0" + "From\0linu.cherian@cavium.com (Linu Cherian)\0" + "Subject\0[v4 3/4] iommu/arm-smmu-v3: Add workaround for Cavium ThunderX2 erratum #74\0" "Date\0Wed, 10 May 2017 11:01:05 +0530\0" - "To\0Robin Murphy <robin.murphy-5wv7dgnIgG8@public.gmane.org>\0" - "Cc\0linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org" - catalin.marinas-5wv7dgnIgG8@public.gmane.org - Geetha Sowjanya <geethasowjanya.akula-YGCgFSpz5w/QT0dZR+AlfA@public.gmane.org> - jcm-H+wXaHxf7aLQT0dZR+AlfA@public.gmane.org - Geetha sowjanya <gakula-M3mlKVOIwJVv6pq1l3V1OdBPR1lH4CV8@public.gmane.org> - will.deacon-5wv7dgnIgG8@public.gmane.org - linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org - geethasowjanya.akula-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org - linux-acpi-u79uwXL29TY76Z2rM5mHXA@public.gmane.org - iommu-cunTk1MwBs9QetFLy7KEm3xJsTq8ys+cHZ5vskTnxNA@public.gmane.org - sudeep.holla-5wv7dgnIgG8@public.gmane.org - sgoutham-YGCgFSpz5w/QT0dZR+AlfA@public.gmane.org - robert.richter-YGCgFSpz5w/QT0dZR+AlfA@public.gmane.org - " Charles.Garcia-Tobin-5wv7dgnIgG8@public.gmane.org\0" + "To\0linux-arm-kernel@lists.infradead.org\0" "\00:1\0" "b\0" "> On Tue May 09, 2017 at 02:02:58PM +0100, Robin Murphy wrote:\n" "> > On 09/05/17 12:45, Geetha sowjanya wrote:\n" - "> > > From: Linu Cherian <linu.cherian-YGCgFSpz5w/QT0dZR+AlfA@public.gmane.org>\n" + "> > > From: Linu Cherian <linu.cherian@cavium.com>\n" "> > > \n" "> > > Cavium ThunderX2 SMMU implementation doesn't support page 1 register space\n" "> > > and PAGE0_REGS_ONLY option is enabled as an errata workaround.\n" @@ -36,8 +22,8 @@ "> > > For this, arm_smmu_device_dt_probe/acpi_probe has been moved before\n" "> > > platform_get_resource call, so that SMMU options are set beforehand.\n" "> > > \n" - "> > > Signed-off-by: Linu Cherian <linu.cherian-YGCgFSpz5w/QT0dZR+AlfA@public.gmane.org>\n" - "> > > Signed-off-by: Geetha Sowjanya <geethasowjanya.akula-YGCgFSpz5w/QT0dZR+AlfA@public.gmane.org>\n" + "> > > Signed-off-by: Linu Cherian <linu.cherian@cavium.com>\n" + "> > > Signed-off-by: Geetha Sowjanya <geethasowjanya.akula@cavium.com>\n" "> > > ---\n" "> > > Documentation/arm64/silicon-errata.txt | 1 +\n" "> > > .../devicetree/bindings/iommu/arm,smmu-v3.txt | 6 ++\n" @@ -72,7 +58,7 @@ "> > > +\n" "> > > ** Example\n" "> > > \n" - "> > > smmu@2b400000 {\n" + "> > > smmu at 2b400000 {\n" "> > > diff --git a/drivers/iommu/arm-smmu-v3.c b/drivers/iommu/arm-smmu-v3.c\n" "> > > index 380969a..1e986a0 100644\n" "> > > --- a/drivers/iommu/arm-smmu-v3.c\n" @@ -227,4 +213,4 @@ "-- \n" Linu cherian -6ce2fbc525cb1bcdbb1192e74aedbeac389ef0de2e06dee6aacfd02825af38bb +8caaabc2811ad4795171cbcfd9bbe0907df1d95fc65992848781af5a849473c9
diff --git a/a/1.txt b/N2/1.txt index 4015858..a92f7f4 100644 --- a/a/1.txt +++ b/N2/1.txt @@ -1,6 +1,6 @@ > On Tue May 09, 2017 at 02:02:58PM +0100, Robin Murphy wrote: > > On 09/05/17 12:45, Geetha sowjanya wrote: -> > > From: Linu Cherian <linu.cherian-YGCgFSpz5w/QT0dZR+AlfA@public.gmane.org> +> > > From: Linu Cherian <linu.cherian@cavium.com> > > > > > > Cavium ThunderX2 SMMU implementation doesn't support page 1 register space > > > and PAGE0_REGS_ONLY option is enabled as an errata workaround. @@ -12,8 +12,8 @@ > > > For this, arm_smmu_device_dt_probe/acpi_probe has been moved before > > > platform_get_resource call, so that SMMU options are set beforehand. > > > -> > > Signed-off-by: Linu Cherian <linu.cherian-YGCgFSpz5w/QT0dZR+AlfA@public.gmane.org> -> > > Signed-off-by: Geetha Sowjanya <geethasowjanya.akula-YGCgFSpz5w/QT0dZR+AlfA@public.gmane.org> +> > > Signed-off-by: Linu Cherian <linu.cherian@cavium.com> +> > > Signed-off-by: Geetha Sowjanya <geethasowjanya.akula@cavium.com> > > > --- > > > Documentation/arm64/silicon-errata.txt | 1 + > > > .../devicetree/bindings/iommu/arm,smmu-v3.txt | 6 ++ diff --git a/a/content_digest b/N2/content_digest index 8a61507..8ef986a 100644 --- a/a/content_digest +++ b/N2/content_digest @@ -2,29 +2,31 @@ "ref\01494330314-30179-4-git-send-email-gakula@caviumnetworks.com\0" "ref\0bd0b9567-ccc5-8bf2-b113-d0f7a1ab2ed2@arm.com\0" "ref\020170509134856.GA1090@virtx40\0" - "From\0Linu Cherian <linu.cherian-YGCgFSpz5w/QT0dZR+AlfA@public.gmane.org>\0" + "From\0Linu Cherian <linu.cherian@cavium.com>\0" "Subject\0Re: [v4 3/4] iommu/arm-smmu-v3: Add workaround for Cavium ThunderX2 erratum #74\0" "Date\0Wed, 10 May 2017 11:01:05 +0530\0" - "To\0Robin Murphy <robin.murphy-5wv7dgnIgG8@public.gmane.org>\0" - "Cc\0linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org" - catalin.marinas-5wv7dgnIgG8@public.gmane.org - Geetha Sowjanya <geethasowjanya.akula-YGCgFSpz5w/QT0dZR+AlfA@public.gmane.org> - jcm-H+wXaHxf7aLQT0dZR+AlfA@public.gmane.org - Geetha sowjanya <gakula-M3mlKVOIwJVv6pq1l3V1OdBPR1lH4CV8@public.gmane.org> - will.deacon-5wv7dgnIgG8@public.gmane.org - linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org - geethasowjanya.akula-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org - linux-acpi-u79uwXL29TY76Z2rM5mHXA@public.gmane.org - iommu-cunTk1MwBs9QetFLy7KEm3xJsTq8ys+cHZ5vskTnxNA@public.gmane.org - sudeep.holla-5wv7dgnIgG8@public.gmane.org - sgoutham-YGCgFSpz5w/QT0dZR+AlfA@public.gmane.org - robert.richter-YGCgFSpz5w/QT0dZR+AlfA@public.gmane.org - " Charles.Garcia-Tobin-5wv7dgnIgG8@public.gmane.org\0" + "To\0Robin Murphy <robin.murphy@arm.com>\0" + "Cc\0Geetha sowjanya <gakula@caviumnetworks.com>" + will.deacon@arm.com + lorenzo.pieralisi@arm.com + hanjun.guo@linaro.org + sudeep.holla@arm.com + iommu@lists.linux-foundation.org + jcm@redhat.com + linux-kernel@vger.kernel.org + robert.richter@cavium.com + catalin.marinas@arm.com + sgoutham@cavium.com + linux-arm-kernel@lists.infradead.org + linux-acpi@vger.kernel.org + geethasowjanya.akula@gmail.com + Charles.Garcia-Tobin@arm.com + " Geetha Sowjanya <geethasowjanya.akula@cavium.com>\0" "\00:1\0" "b\0" "> On Tue May 09, 2017 at 02:02:58PM +0100, Robin Murphy wrote:\n" "> > On 09/05/17 12:45, Geetha sowjanya wrote:\n" - "> > > From: Linu Cherian <linu.cherian-YGCgFSpz5w/QT0dZR+AlfA@public.gmane.org>\n" + "> > > From: Linu Cherian <linu.cherian@cavium.com>\n" "> > > \n" "> > > Cavium ThunderX2 SMMU implementation doesn't support page 1 register space\n" "> > > and PAGE0_REGS_ONLY option is enabled as an errata workaround.\n" @@ -36,8 +38,8 @@ "> > > For this, arm_smmu_device_dt_probe/acpi_probe has been moved before\n" "> > > platform_get_resource call, so that SMMU options are set beforehand.\n" "> > > \n" - "> > > Signed-off-by: Linu Cherian <linu.cherian-YGCgFSpz5w/QT0dZR+AlfA@public.gmane.org>\n" - "> > > Signed-off-by: Geetha Sowjanya <geethasowjanya.akula-YGCgFSpz5w/QT0dZR+AlfA@public.gmane.org>\n" + "> > > Signed-off-by: Linu Cherian <linu.cherian@cavium.com>\n" + "> > > Signed-off-by: Geetha Sowjanya <geethasowjanya.akula@cavium.com>\n" "> > > ---\n" "> > > Documentation/arm64/silicon-errata.txt | 1 +\n" "> > > .../devicetree/bindings/iommu/arm,smmu-v3.txt | 6 ++\n" @@ -227,4 +229,4 @@ "-- \n" Linu cherian -6ce2fbc525cb1bcdbb1192e74aedbeac389ef0de2e06dee6aacfd02825af38bb +1158c8f00d587b1f7ede6ee869a59cf618ed147522a7f0b364e05ee9d2918bb3
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