From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:54345) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1d9KVG-0008L1-I6 for qemu-devel@nongnu.org; Fri, 12 May 2017 20:01:47 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1d9KVD-0006bv-G9 for qemu-devel@nongnu.org; Fri, 12 May 2017 20:01:46 -0400 Received: from mail-qk0-x233.google.com ([2607:f8b0:400d:c09::233]:36611) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1d9KVD-0006bH-9Y for qemu-devel@nongnu.org; Fri, 12 May 2017 20:01:43 -0400 Received: by mail-qk0-x233.google.com with SMTP id u75so59910692qka.3 for ; Fri, 12 May 2017 17:01:43 -0700 (PDT) Date: Fri, 12 May 2017 20:01:41 -0400 From: Kevin O'Connor Message-ID: <20170513000141.GA542@morn.lan> References: <1494502528-12670-1-git-send-email-pbonzini@redhat.com> <20170511145312.GA822@morn.lan> <618febcf-af6d-5fc6-0274-4f64c53f9763@redhat.com> <20170511163447.GA7785@morn.lan> <4712D8F4B26E034E80552F30A67BE0B1AB61D5@ORSMSX112.amr.corp.intel.com> <4712D8F4B26E034E80552F30A67BE0B1AB6AA2@ORSMSX112.amr.corp.intel.com> <20170512193840.GA22454@morn.lan> <4712D8F4B26E034E80552F30A67BE0B1AB6CBF@ORSMSX112.amr.corp.intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <4712D8F4B26E034E80552F30A67BE0B1AB6CBF@ORSMSX112.amr.corp.intel.com> Subject: Re: [Qemu-devel] [PATCH] target/i386: enable A20 automatically in system management mode List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: "Xu, Anthony" Cc: Paolo Bonzini , "qemu-devel@nongnu.org" On Fri, May 12, 2017 at 11:19:00PM +0000, Xu, Anthony wrote: > > SeaBIOS defaults to enabling A20 and it's a rare beast that disables > > it. One could change x86.h:set_a20 and romlayout.S:transition32 to > > only issue the outb() if the inb() indicates a change is needed. That > > would likely eliminate half the accesses. > > The 350 port 92 access is for write operation only. > If include the inb(), it would be 700, and every time it actually has a change > To be precise, It is about 175 switches from 32 bit to 16 bit, then back to 32 bit. > call16 is called 175 times during Seabios boot without any option rom, > It would be more if some option roms are included. > > > I think A20 is disabled by default in SeaBios. I don't know why you think that. One can check with: --- a/src/stacks.c +++ b/src/stacks.c @@ -99,6 +99,8 @@ call32_post(void) if (cr0_caching) cr0_mask(CR0_CD|CR0_NW, cr0_caching); } + if (!get_a20()) + dprintf(1, "a20=0\n"); // Restore cmos index register outb(GET_LOW(Call16Data.cmosindex), PORT_CMOS_INDEX); With the above I only see a handful of cases where SeaBIOS has to restore a20 to a disabled state. The handful I do see are due to cases where yield() is called prior to option rom initialization. Those handful are eliminated for me with the following fix: --- a/src/stacks.c +++ b/src/stacks.c @@ -496,6 +496,7 @@ void thread_setup(void) { CanInterrupt = 1; + call16_override(1); if (! CONFIG_THREADS) return; ThreadControl = romfile_loadint("etc/threads", 1); What OS / bootloader are you running? -Kevin