Re: [PATCH 3/6] eal/arm64: rte pause implementation for arm64

[Jerin Jacob <jerin.jacob@caviumnetworks.com>]

-----Original Message-----
> Date: Thu, 18 May 2017 17:40:58 +0800
> From: Jianbo Liu <jianbo.liu@linaro.org>
> To: Jerin Jacob <jerin.jacob@caviumnetworks.com>
> Cc: dev@dpdk.org, thomas@monjalon.net, Jan Viktorin
>  <viktorin@rehivetech.com>
> Subject: Re: [dpdk-dev] [PATCH 3/6] eal/arm64: rte pause implementation for
>  arm64
> 
> On 11 May 2017 at 18:10, Jerin Jacob <jerin.jacob@caviumnetworks.com> wrote:
> > CC: Jianbo Liu <jianbo.liu@linaro.org>
> > Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
> > ---
> >  lib/librte_eal/common/include/arch/arm/rte_pause.h |  4 ++
> >  .../common/include/arch/arm/rte_pause_64.h         | 55 ++++++++++++++++++++++
> >  2 files changed, 59 insertions(+)
> >  create mode 100644 lib/librte_eal/common/include/arch/arm/rte_pause_64.h
> >
> > diff --git a/lib/librte_eal/common/include/arch/arm/rte_pause.h b/lib/librte_eal/common/include/arch/arm/rte_pause.h
> > index 0fe88aba9..9b79405e6 100644
> > --- a/lib/librte_eal/common/include/arch/arm/rte_pause.h
> > +++ b/lib/librte_eal/common/include/arch/arm/rte_pause.h
> > @@ -37,7 +37,11 @@
> >  extern "C" {
> >  #endif
> >
> > +#ifdef RTE_ARCH_64
> > +#include <rte_pause_64.h>
> > +#else
> >  #include <rte_pause_32.h>
> > +#endif
> >
> >  #ifdef __cplusplus
> >  }
> > diff --git a/lib/librte_eal/common/include/arch/arm/rte_pause_64.h b/lib/librte_eal/common/include/arch/arm/rte_pause_64.h
> > new file mode 100644
> > index 000000000..cae996de8
> > --- /dev/null
> > +++ b/lib/librte_eal/common/include/arch/arm/rte_pause_64.h
> > @@ -0,0 +1,55 @@
> > +/*
> > + *   BSD LICENSE
> > + *
> > + *   Copyright(c) 2017 Cavium. All rights reserved.
> > + *
> > + *   Redistribution and use in source and binary forms, with or without
> > + *   modification, are permitted provided that the following conditions
> > + *   are met:
> > + *
> > + *     * Redistributions of source code must retain the above copyright
> > + *       notice, this list of conditions and the following disclaimer.
> > + *     * Redistributions in binary form must reproduce the above copyright
> > + *       notice, this list of conditions and the following disclaimer in
> > + *       the documentation and/or other materials provided with the
> > + *       distribution.
> > + *     * Neither the name of Cavium nor the names of its
> > + *       contributors may be used to endorse or promote products derived
> > + *       from this software without specific prior written permission.
> > + *
> > + *   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
> > + *   "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
> > + *   LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
> > + *   A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
> > + *   OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
> > + *   SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
> > + *   LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
> > + *   DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
> > + *   THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
> > + *   (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
> > + *   OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
> > + */
> > +
> > +#ifndef _RTE_PAUSE_ARM64_H_
> > +#define _RTE_PAUSE_ARM64_H_
> > +
> > +#ifdef __cplusplus
> > +extern "C" {
> > +#endif
> > +
> > +#include <rte_common.h>
> > +#include "generic/rte_pause.h"
> > +
> > +static inline void rte_pause(void)
> > +{
> > +       /* YIELD hints the CPU to switch to another thread if possible
> > +        * and executes as a NOP otherwise.
> 
> I think you can remove the second line if you are trying to explain
> what YIELD instruction is.
> And I wonder if it can save power as rte_thread is bounded to certain
> core and always polling while YIELD is only a hint instruction.

AFAIK, It is HW thread not software OS thread.ie Simultaneous Multi-Threading (SMT)
or Hyper threading.

For example, Cavium 99xx has 4 HW threads per physical core.

I agree on comment. I think, I can remove the comment as YIELD is just a hint
and varies based on arm64 implementation. Will fix it v2.

> 
> > +        */
> > +       asm volatile("yield" ::: "memory");
> > +}
> > +
> > +#ifdef __cplusplus
> > +}
> > +#endif
> > +
> > +#endif /* _RTE_PAUSE_ARM64_H_ */
> > --
> > 2.12.2
> >