From mboxrd@z Thu Jan 1 00:00:00 1970 Received: with ECARTIS (v1.0.0; list linux-mips); Tue, 23 May 2017 22:33:02 +0200 (CEST) Received: from mail.linuxfoundation.org ([140.211.169.12]:50648 "EHLO mail.linuxfoundation.org" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S23995036AbdEWUcyUhoev (ORCPT ); Tue, 23 May 2017 22:32:54 +0200 Received: from localhost (LStLambert-658-1-235-21.w80-13.abo.wanadoo.fr [80.13.254.21]) by mail.linuxfoundation.org (Postfix) with ESMTPSA id 50E3E8D9; Tue, 23 May 2017 20:32:47 +0000 (UTC) From: Greg Kroah-Hartman To: linux-kernel@vger.kernel.org Cc: Greg Kroah-Hartman , stable@vger.kernel.org, Huacai Chen , John Crispin , "Steven J . Hill" , Fuxin Zhang , Zhangjin Wu , linux-mips@linux-mips.org, Ralf Baechle Subject: [PATCH 4.9 144/164] MIPS: Loongson-3: Select MIPS_L1_CACHE_SHIFT_6 Date: Tue, 23 May 2017 22:09:21 +0200 Message-Id: <20170523200913.302131196@linuxfoundation.org> X-Mailer: git-send-email 2.13.0 In-Reply-To: <20170523200907.297534241@linuxfoundation.org> References: <20170523200907.297534241@linuxfoundation.org> User-Agent: quilt/0.65 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 57957 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: gregkh@linuxfoundation.org Precedence: bulk List-help: List-unsubscribe: List-software: Ecartis version 1.0.0 List-Id: linux-mips X-List-ID: linux-mips List-subscribe: List-owner: List-post: List-archive: X-list: linux-mips 4.9-stable review patch. If anyone has any objections, please let me know. ------------------ From: Huacai Chen commit 17c99d9421695a0e0de18bf1e7091d859e20ec1d upstream. Some newer Loongson-3 have 64 bytes cache lines, so select MIPS_L1_CACHE_SHIFT_6. Signed-off-by: Huacai Chen Cc: John Crispin Cc: Steven J . Hill Cc: Fuxin Zhang Cc: Zhangjin Wu Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/15755/ Signed-off-by: Ralf Baechle Signed-off-by: Greg Kroah-Hartman --- arch/mips/Kconfig | 1 + 1 file changed, 1 insertion(+) --- a/arch/mips/Kconfig +++ b/arch/mips/Kconfig @@ -1368,6 +1368,7 @@ config CPU_LOONGSON3 select WEAK_ORDERING select WEAK_REORDERING_BEYOND_LLSC select MIPS_PGD_C0_CONTEXT + select MIPS_L1_CACHE_SHIFT_6 select GPIOLIB help The Loongson 3 processor implements the MIPS64R2 instruction