From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1750990AbdE1JKz (ORCPT ); Sun, 28 May 2017 05:10:55 -0400 Received: from mga03.intel.com ([134.134.136.65]:52787 "EHLO mga03.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750839AbdE1JKy (ORCPT ); Sun, 28 May 2017 05:10:54 -0400 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.38,408,1491289200"; d="scan'208";a="1153749233" Date: Sun, 28 May 2017 12:10:47 +0300 From: Mika Westerberg To: Andy Shevchenko Cc: Greg Kroah-Hartman , Andreas Noever , Michael Jamet , Yehezkel Bernat , Lukas Wunner , Amir Levy , Andy Lutomirski , Mario Limonciello , Jared.Dominguez@dell.com, Andy Shevchenko , "linux-kernel@vger.kernel.org" Subject: Re: [PATCH v2 22/27] thunderbolt: Add support for DMA configuration based mailbox Message-ID: <20170528091047.GJ2784@lahna.fi.intel.com> References: <20170526160936.54265-1-mika.westerberg@linux.intel.com> <20170526160936.54265-23-mika.westerberg@linux.intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo User-Agent: Mutt/1.7.1 (2016-10-04) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Sat, May 27, 2017 at 07:08:34PM +0300, Andy Shevchenko wrote: > On Fri, May 26, 2017 at 7:09 PM, Mika Westerberg > wrote: > > The DMA (NHI) port of a switch provides access to the NVM of the host > > controller (and devices starting from Intel Alpine Ridge). The NVM > > contains also more complete DROM for the root switch including vendor > > and device identification strings. > > > + ret = dma_port_flash_read_block(dma, address, dma->buf, > > + ALIGN(nbytes, 4)); > > + if (ret) { > > + if (ret == -ETIMEDOUT) { > > + if (retries--) > > + continue; > > + ret = -EIO; > > + } > > + return ret; > > + } > > + > > + memcpy(buf, dma->buf + offset, nbytes); > > > + do { > > + u32 nbytes = min_t(u32, size, MAIL_DATA_DWORDS * 4); > > + int ret; > > + > > + memcpy(dma->buf + offset, buf, nbytes); > > + > > + ret = dma_port_flash_write_block(dma, address, buf, nbytes); > > + if (ret) { > > + if (ret == -ETIMEDOUT) { > > + if (retries--) > > + continue; > > + ret = -EIO; > > + } > > + return ret; > > + } > > Just to be sure I didn't miss anything. > Can't we just map buffer into DMA capable address space instead of memcpy()'ing? The buffer is there to handle unaligned (non-dword) reads and writes. I suppose you could do that but it adds more complexity than it is worth IMHO because this is about sending and receiving messages over low-speed control channel. If there is a need to optimize things like this, I think we can do that later on.