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Date: Thu, 1 Jun 2017 00:25:45 -0700
From: Stephen Boyd <sboyd@codeaurora.org>
To: Fabio Estevam <festevam@gmail.com>
Cc: shawnguo@kernel.org, kernel@pengutronix.de,
        linux-clk@vger.kernel.org, stefan@agner.ch,
        Fabio Estevam <fabio.estevam@nxp.com>
Subject: Re: [PATCH v2] clk: imx7d: Fix the powerdown bit location of PLL DDR
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On 05/15, Fabio Estevam wrote:
> From: Fabio Estevam <fabio.estevam@nxp.com>
> 
> According to the MX7D Reference Manual the powerdown bit of
> CCM_ANALOG_PLL_DDRn register is bit 20, so fix it accordingly.
> 
> Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
> Reviewed-by: Stefan Agner <stefan@agner.ch>
> ---

Applied to clk-next

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