diff for duplicates of <20170609113832.GB106079@localhost> diff --git a/a/1.txt b/N1/1.txt index 377784e..1382e78 100644 --- a/a/1.txt +++ b/N1/1.txt @@ -1,7 +1,7 @@ On Fri, Jun 09, 2017 Robin Murphy wrote: > > On 30/05/17 13:03, Geetha sowjanya wrote: -> > From: Linu Cherian <linu.cherian-YGCgFSpz5w/QT0dZR+AlfA@public.gmane.org> +> > From: Linu Cherian <linu.cherian@cavium.com> > > > > Cavium ThunderX2 SMMU implementation doesn't support page 1 register space > > and PAGE0_REGS_ONLY option is enabled as an errata workaround. @@ -13,8 +13,8 @@ On Fri, Jun 09, 2017 Robin Murphy wrote: > > For this, arm_smmu_device_dt_probe/acpi_probe has been moved before > > platform_get_resource call, so that SMMU options are set beforehand. > > -> > Signed-off-by: Linu Cherian <linu.cherian-YGCgFSpz5w/QT0dZR+AlfA@public.gmane.org> -> > Signed-off-by: Geetha Sowjanya <geethasowjanya.akula-YGCgFSpz5w/QT0dZR+AlfA@public.gmane.org> +> > Signed-off-by: Linu Cherian <linu.cherian@cavium.com> +> > Signed-off-by: Geetha Sowjanya <geethasowjanya.akula@cavium.com> > > --- > > Documentation/arm64/silicon-errata.txt | 1 + > > .../devicetree/bindings/iommu/arm,smmu-v3.txt | 6 ++ @@ -54,7 +54,7 @@ On Fri, Jun 09, 2017 Robin Murphy wrote: > > + > > ** Example > > -> > smmu@2b400000 { +> > smmu at 2b400000 { > > diff --git a/drivers/iommu/arm-smmu-v3.c b/drivers/iommu/arm-smmu-v3.c > > index 380969a..4e80205 100644 > > --- a/drivers/iommu/arm-smmu-v3.c diff --git a/a/content_digest b/N1/content_digest index 98e5917..8061d74 100644 --- a/a/content_digest +++ b/N1/content_digest @@ -2,37 +2,16 @@ "ref\01496145821-3411-3-git-send-email-gakula@caviumnetworks.com\0" "ref\09263562d-03a3-d02e-6b7e-01613a4bd296@arm.com\0" "ref\0CA+7sy7C_44dTy0-nAE=b5BCXmc8ACQx2O6A1jCOCsemZDD5j4w@mail.gmail.com\0" - "ref\0CA+7sy7C_44dTy0-nAE=b5BCXmc8ACQx2O6A1jCOCsemZDD5j4w-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org\0" - "From\0Jayachandran C <jnair-M3mlKVOIwJVv6pq1l3V1OdBPR1lH4CV8@public.gmane.org>\0" - "Subject\0Re: Fwd: [PATCH v7 2/3] iommu/arm-smmu-v3: Add workaround for Cavium ThunderX2 erratum #74\0" + "From\0jnair@caviumnetworks.com (Jayachandran C)\0" + "Subject\0Fwd: [PATCH v7 2/3] iommu/arm-smmu-v3: Add workaround for Cavium ThunderX2 erratum #74\0" "Date\0Fri, 9 Jun 2017 11:38:32 +0000\0" - "To\0Robin Murphy <robin.murphy-5wv7dgnIgG8@public.gmane.org>\0" - "Cc\0catalin.marinas-5wv7dgnIgG8@public.gmane.org" - will.deacon-5wv7dgnIgG8@public.gmane.org - Geetha Sowjanya <geethasowjanya.akula-YGCgFSpz5w/QT0dZR+AlfA@public.gmane.org> - robert.richter-YGCgFSpz5w/QT0dZR+AlfA@public.gmane.org - lv.zheng-ral2JQCrhuEAvxtiuMwx3w@public.gmane.org - robh-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org - Geetha sowjanya <gakula-M3mlKVOIwJVv6pq1l3V1OdBPR1lH4CV8@public.gmane.org> - robert.moore-ral2JQCrhuEAvxtiuMwx3w@public.gmane.org - linux-acpi-u79uwXL29TY76Z2rM5mHXA@public.gmane.org - sgoutham-YGCgFSpz5w/QT0dZR+AlfA@public.gmane.org - Charles.Garcia-Tobin-5wv7dgnIgG8@public.gmane.org - jcm-H+wXaHxf7aLQT0dZR+AlfA@public.gmane.org - sudeep.holla-5wv7dgnIgG8@public.gmane.org - geethasowjanya.akula-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org - linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org - devel-E0kO6a4B6psdnm+yROfE0A@public.gmane.org - rjw-LthD3rsA81gm4RdzfppkhA@public.gmane.org - linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org - iommu-cunTk1MwBs9QetFLy7KEm3xJsTq8ys+cHZ5vskTnxNA@public.gmane.org - " linu.cherian-YGCgFSpz5w/QT0dZR+AlfA@public.gmane.org\0" + "To\0linux-arm-kernel@lists.infradead.org\0" "\00:1\0" "b\0" "On Fri, Jun 09, 2017 Robin Murphy wrote:\n" "> \n" "> On 30/05/17 13:03, Geetha sowjanya wrote:\n" - "> > From: Linu Cherian <linu.cherian-YGCgFSpz5w/QT0dZR+AlfA@public.gmane.org>\n" + "> > From: Linu Cherian <linu.cherian@cavium.com>\n" "> >\n" "> > Cavium ThunderX2 SMMU implementation doesn't support page 1 register space\n" "> > and PAGE0_REGS_ONLY option is enabled as an errata workaround.\n" @@ -44,8 +23,8 @@ "> > For this, arm_smmu_device_dt_probe/acpi_probe has been moved before\n" "> > platform_get_resource call, so that SMMU options are set beforehand.\n" "> >\n" - "> > Signed-off-by: Linu Cherian <linu.cherian-YGCgFSpz5w/QT0dZR+AlfA@public.gmane.org>\n" - "> > Signed-off-by: Geetha Sowjanya <geethasowjanya.akula-YGCgFSpz5w/QT0dZR+AlfA@public.gmane.org>\n" + "> > Signed-off-by: Linu Cherian <linu.cherian@cavium.com>\n" + "> > Signed-off-by: Geetha Sowjanya <geethasowjanya.akula@cavium.com>\n" "> > ---\n" "> > Documentation/arm64/silicon-errata.txt | 1 +\n" "> > .../devicetree/bindings/iommu/arm,smmu-v3.txt | 6 ++\n" @@ -85,7 +64,7 @@ "> > +\n" "> > ** Example\n" "> >\n" - "> > smmu@2b400000 {\n" + "> > smmu at 2b400000 {\n" "> > diff --git a/drivers/iommu/arm-smmu-v3.c b/drivers/iommu/arm-smmu-v3.c\n" "> > index 380969a..4e80205 100644\n" "> > --- a/drivers/iommu/arm-smmu-v3.c\n" @@ -328,4 +307,4 @@ "-- \n" 2.7.4 -4d90afe549bb9085d652ca0410cdaf24d5cc34c33d0377884101891d000188eb +1c024109e58d8e340b4878dea3f1d977da83628568e3ad33002410b7b79eaf2a
diff --git a/a/1.txt b/N2/1.txt index 377784e..09a4154 100644 --- a/a/1.txt +++ b/N2/1.txt @@ -1,7 +1,7 @@ On Fri, Jun 09, 2017 Robin Murphy wrote: > > On 30/05/17 13:03, Geetha sowjanya wrote: -> > From: Linu Cherian <linu.cherian-YGCgFSpz5w/QT0dZR+AlfA@public.gmane.org> +> > From: Linu Cherian <linu.cherian@cavium.com> > > > > Cavium ThunderX2 SMMU implementation doesn't support page 1 register space > > and PAGE0_REGS_ONLY option is enabled as an errata workaround. @@ -13,8 +13,8 @@ On Fri, Jun 09, 2017 Robin Murphy wrote: > > For this, arm_smmu_device_dt_probe/acpi_probe has been moved before > > platform_get_resource call, so that SMMU options are set beforehand. > > -> > Signed-off-by: Linu Cherian <linu.cherian-YGCgFSpz5w/QT0dZR+AlfA@public.gmane.org> -> > Signed-off-by: Geetha Sowjanya <geethasowjanya.akula-YGCgFSpz5w/QT0dZR+AlfA@public.gmane.org> +> > Signed-off-by: Linu Cherian <linu.cherian@cavium.com> +> > Signed-off-by: Geetha Sowjanya <geethasowjanya.akula@cavium.com> > > --- > > Documentation/arm64/silicon-errata.txt | 1 + > > .../devicetree/bindings/iommu/arm,smmu-v3.txt | 6 ++ diff --git a/a/content_digest b/N2/content_digest index 98e5917..5df05c2 100644 --- a/a/content_digest +++ b/N2/content_digest @@ -2,37 +2,38 @@ "ref\01496145821-3411-3-git-send-email-gakula@caviumnetworks.com\0" "ref\09263562d-03a3-d02e-6b7e-01613a4bd296@arm.com\0" "ref\0CA+7sy7C_44dTy0-nAE=b5BCXmc8ACQx2O6A1jCOCsemZDD5j4w@mail.gmail.com\0" - "ref\0CA+7sy7C_44dTy0-nAE=b5BCXmc8ACQx2O6A1jCOCsemZDD5j4w-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org\0" - "From\0Jayachandran C <jnair-M3mlKVOIwJVv6pq1l3V1OdBPR1lH4CV8@public.gmane.org>\0" + "From\0Jayachandran C <jnair@caviumnetworks.com>\0" "Subject\0Re: Fwd: [PATCH v7 2/3] iommu/arm-smmu-v3: Add workaround for Cavium ThunderX2 erratum #74\0" "Date\0Fri, 9 Jun 2017 11:38:32 +0000\0" - "To\0Robin Murphy <robin.murphy-5wv7dgnIgG8@public.gmane.org>\0" - "Cc\0catalin.marinas-5wv7dgnIgG8@public.gmane.org" - will.deacon-5wv7dgnIgG8@public.gmane.org - Geetha Sowjanya <geethasowjanya.akula-YGCgFSpz5w/QT0dZR+AlfA@public.gmane.org> - robert.richter-YGCgFSpz5w/QT0dZR+AlfA@public.gmane.org - lv.zheng-ral2JQCrhuEAvxtiuMwx3w@public.gmane.org - robh-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org - Geetha sowjanya <gakula-M3mlKVOIwJVv6pq1l3V1OdBPR1lH4CV8@public.gmane.org> - robert.moore-ral2JQCrhuEAvxtiuMwx3w@public.gmane.org - linux-acpi-u79uwXL29TY76Z2rM5mHXA@public.gmane.org - sgoutham-YGCgFSpz5w/QT0dZR+AlfA@public.gmane.org - Charles.Garcia-Tobin-5wv7dgnIgG8@public.gmane.org - jcm-H+wXaHxf7aLQT0dZR+AlfA@public.gmane.org - sudeep.holla-5wv7dgnIgG8@public.gmane.org - geethasowjanya.akula-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org - linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org - devel-E0kO6a4B6psdnm+yROfE0A@public.gmane.org - rjw-LthD3rsA81gm4RdzfppkhA@public.gmane.org - linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org - iommu-cunTk1MwBs9QetFLy7KEm3xJsTq8ys+cHZ5vskTnxNA@public.gmane.org - " linu.cherian-YGCgFSpz5w/QT0dZR+AlfA@public.gmane.org\0" + "To\0Robin Murphy <robin.murphy@arm.com>\0" + "Cc\0Geetha sowjanya <gakula@caviumnetworks.com>" + will.deacon@arm.com + lorenzo.pieralisi@arm.com + hanjun.guo@linaro.org + sudeep.holla@arm.com + iommu@lists.linux-foundation.org + robh@kernel.org + Charles.Garcia-Tobin@arm.com + Geetha Sowjanya <geethasowjanya.akula@cavium.com> + geethasowjanya.akula@gmail.com + jcm@redhat.com + linu.cherian@cavium.com + rjw@rjwysocki.net + robert.moore@intel.com + linux-kernel@vger.kernel.org + linux-acpi@vger.kernel.org + robert.richter@cavium.com + lv.zheng@intel.com + catalin.marinas@arm.com + sgoutham@cavium.com + linux-arm-kernel@lists.infradead.org + " devel@acpica.org\0" "\00:1\0" "b\0" "On Fri, Jun 09, 2017 Robin Murphy wrote:\n" "> \n" "> On 30/05/17 13:03, Geetha sowjanya wrote:\n" - "> > From: Linu Cherian <linu.cherian-YGCgFSpz5w/QT0dZR+AlfA@public.gmane.org>\n" + "> > From: Linu Cherian <linu.cherian@cavium.com>\n" "> >\n" "> > Cavium ThunderX2 SMMU implementation doesn't support page 1 register space\n" "> > and PAGE0_REGS_ONLY option is enabled as an errata workaround.\n" @@ -44,8 +45,8 @@ "> > For this, arm_smmu_device_dt_probe/acpi_probe has been moved before\n" "> > platform_get_resource call, so that SMMU options are set beforehand.\n" "> >\n" - "> > Signed-off-by: Linu Cherian <linu.cherian-YGCgFSpz5w/QT0dZR+AlfA@public.gmane.org>\n" - "> > Signed-off-by: Geetha Sowjanya <geethasowjanya.akula-YGCgFSpz5w/QT0dZR+AlfA@public.gmane.org>\n" + "> > Signed-off-by: Linu Cherian <linu.cherian@cavium.com>\n" + "> > Signed-off-by: Geetha Sowjanya <geethasowjanya.akula@cavium.com>\n" "> > ---\n" "> > Documentation/arm64/silicon-errata.txt | 1 +\n" "> > .../devicetree/bindings/iommu/arm,smmu-v3.txt | 6 ++\n" @@ -328,4 +329,4 @@ "-- \n" 2.7.4 -4d90afe549bb9085d652ca0410cdaf24d5cc34c33d0377884101891d000188eb +b9d89a567b4e573b4f755933beb1ed6da05c700b4158b4e2b4d123ddb69b56ed
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