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From: Karol Herbst <karolherbst@gmail.com>
To: mesa-dev@lists.freedesktop.org
Cc: nouveau@lists.freedesktop.org
Subject: [RFC 9/9] nv50/ir/tgsi: split mad to mul+add
Date: Sun, 11 Jun 2017 20:42:39 +0200	[thread overview]
Message-ID: <20170611184239.7204-10-karolherbst@gmail.com> (raw)
In-Reply-To: <20170611184239.7204-1-karolherbst@gmail.com>

fixes
KHR-GL44.gpu_shader5.precise_qualifier
KHR-GL45.gpu_shader5.precise_qualifier

Signed-off-by: Karol Herbst <karolherbst@gmail.com>
---
 src/gallium/drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp | 14 ++++++++++++++
 1 file changed, 14 insertions(+)

diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp
index c633185893..cd45e82426 100644
--- a/src/gallium/drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp
+++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp
@@ -3184,6 +3184,20 @@ Converter::handleInstruction(const struct tgsi_full_instruction *insn)
       break;
    case TGSI_OPCODE_MAD:
    case TGSI_OPCODE_UMAD:
+      FOR_EACH_DST_ENABLED_CHANNEL(0, c, tgsi) {
+         val0 = getSSA();
+         src0 = fetchSrc(0, c);
+         src1 = fetchSrc(1, c);
+         src2 = fetchSrc(2, c);
+         geni = mkOp2(OP_MUL, dstTy, val0, src0, src1);
+         if (dstTy == TYPE_F32)
+            geni->dnz = info->io.mul_zero_wins;
+         geni->precise = insn->Instruction.Precise;
+
+         geni = mkOp2(OP_ADD, dstTy, dst0[c], val0, src2);
+         geni->precise = insn->Instruction.Precise;
+      }
+      break;
    case TGSI_OPCODE_SAD:
    case TGSI_OPCODE_FMA:
       FOR_EACH_DST_ENABLED_CHANNEL(0, c, tgsi) {
-- 
2.13.1

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      parent reply	other threads:[~2017-06-11 18:42 UTC|newest]

Thread overview: 19+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-06-11 18:42 [RFC 0/9] Add precise/invariant semantics to TGSI Karol Herbst
2017-06-11 18:42 ` [RFC 3/9] st/glsl_to_tgsi: handle precise modifier Karol Herbst
     [not found]   ` <20170611184239.7204-4-karolherbst-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2017-06-12 10:41     ` [Mesa-dev] " Nicolai Hähnle
     [not found] ` <20170611184239.7204-1-karolherbst-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2017-06-11 18:42   ` [RFC 1/9] tgsi: add precise flag to tgsi_instruction Karol Herbst
2017-06-11 18:42   ` [RFC 2/9] tgsi/dump: print _PRECISE modifier on Instrutions Karol Herbst
2017-06-11 18:42   ` [RFC 4/9] tgsi: populate precise Karol Herbst
     [not found]     ` <20170611184239.7204-5-karolherbst-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2017-06-12 10:33       ` [Mesa-dev] " Nicolai Hähnle
2017-06-11 18:42   ` [RFC 5/9] tgsi/text: parse _PRECISE modifier Karol Herbst
2017-06-12 10:31     ` Nicolai Hähnle
2017-06-11 18:42   ` [RFC 6/9] nv50/ir: add precise field to Instruction Karol Herbst
2017-06-11 18:42   ` [RFC 7/9] nv50/ir/tgsi: handle precise for most ALU instructions Karol Herbst
2017-06-11 18:42   ` [RFC 8/9] nv50/ir: disable mul+add to mad for precise instructions Karol Herbst
2017-06-12 10:42   ` [Mesa-dev] [RFC 0/9] Add precise/invariant semantics to TGSI Nicolai Hähnle
2017-06-12 23:57     ` Roland Scheidegger
2017-06-13  0:01       ` Roland Scheidegger
     [not found]       ` <8a99cdc6-c415-1423-dd1b-13a09f902288-pghWNbHTmq7QT0dZR+AlfA@public.gmane.org>
2017-06-13  0:05         ` [Mesa-dev] " Ilia Mirkin
     [not found]           ` <CAKb7UviKiLbRG+z4paq8=-6epuWtKSxty2DHw6SQ1LZ+ULQgmw-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2017-06-13  0:33             ` Roland Scheidegger
     [not found]               ` <6ffa13fd-c90b-bda6-b243-13c4857346f7-pghWNbHTmq7QT0dZR+AlfA@public.gmane.org>
2017-06-13 15:06                 ` Marek Olšák
2017-06-11 18:42 ` Karol Herbst [this message]

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