From mboxrd@z Thu Jan 1 00:00:00 1970 From: Lothar =?UTF-8?B?V2HDn21hbm4=?= Subject: Re: [PATCH 2/2] ARM: dts: imx6ul: Add imx6ul-tempmon Date: Mon, 12 Jun 2017 15:37:52 +0200 Message-ID: <20170612153752.3b71516c@karo-electronics.de> References: <7055ce6095c0b7f026ac6f0dc37e43fc5c0b1793.1496939031.git.leonard.crestez@nxp.com> <1497005895.28352.88.camel@nxp.com> <20170609154638.3b64e6d0@karo-electronics.de> <1497022484.28352.105.camel@nxp.com> <20170612124029.1643469d@karo-electronics.de> <1497268028.32422.15.camel@nxp.com> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Return-path: In-Reply-To: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=m.gmane.org@lists.infradead.org To: Fabio Estevam Cc: Bai Ping , "linux-pm@vger.kernel.org" , linux-kernel , Eduardo Valentin , Sascha Hauer , Fabio Estevam , Zhang Rui , Leonard Crestez , Shawn Guo , "linux-arm-kernel@lists.infradead.org" List-Id: linux-pm@vger.kernel.org SGksCgpPbiBNb24sIDEyIEp1biAyMDE3IDEwOjIyOjQ1IC0wMzAwIEZhYmlvIEVzdGV2YW0gd3Jv dGU6Cj4gT24gTW9uLCBKdW4gMTIsIDIwMTcgYXQgODo0NyBBTSwgTGVvbmFyZCBDcmVzdGV6Cj4g PGxlb25hcmQuY3Jlc3RlekBueHAuY29tPiB3cm90ZToKPiAKPiA+IEhvd2V2ZXIgaXQgc2VlbXMg dGhhdCB0aGlzIG1pZ2h0IGJlIGFjY2lkZW50YWwsIGl0IGp1c3QgaGFwcGVucyB0aGF0Cj4gPiB0 aGUgT0NPVFAgY2xvY2sgc3RhcnRzIGFzIGVuYWJsZWQgYW5kIGlzIG9ubHkgZGlzYWJsZWQgbGF0 ZXIgaW4gdGhlCj4gCj4gTW9zdCBsaWtlbHkgYmVjYXVzZSBVLUJvb3QgZW5hYmxlZCB0aGUgT0NP VFAgY2xvY2sgYXMgaXQgcmVhZHMgdGhlCj4gc3BlZWQgZ3JhZGluZyBmdXNlLgo+Ck5vLCB0aGUg aW14NnFfb3BwX2NoZWNrX3NwZWVkX2dyYWRpbmcoKSBydW5zIG9uIGFuIGkuTVg2USB3aGljaCwg YXMKbWVudGlvbmVkIGluIG15IG90aGVyIG1haWwgPDIwMTcwNjEyMTI0MDI5LjE2NDM0NjlkQGth cm8tZWxlY3Ryb25pY3MuZGU+LApkb2VzIG5vdCByZXF1aXJlIGFueSBjbG9jayB0byBiZSBlbmFi bGVkIGZvciBhY2Nlc3NpbmcgdGhlIE9DT1RQIHJlZ3MuCgoKTG90aGFyIFdhw59tYW5uCgpfX19f X19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fXwpsaW51eC1hcm0ta2Vy bmVsIG1haWxpbmcgbGlzdApsaW51eC1hcm0ta2VybmVsQGxpc3RzLmluZnJhZGVhZC5vcmcKaHR0 cDovL2xpc3RzLmluZnJhZGVhZC5vcmcvbWFpbG1hbi9saXN0aW5mby9saW51eC1hcm0ta2VybmVs Cg== From mboxrd@z Thu Jan 1 00:00:00 1970 From: LW@KARO-electronics.de (Lothar =?UTF-8?B?V2HDn21hbm4=?=) Date: Mon, 12 Jun 2017 15:37:52 +0200 Subject: [PATCH 2/2] ARM: dts: imx6ul: Add imx6ul-tempmon In-Reply-To: References: <7055ce6095c0b7f026ac6f0dc37e43fc5c0b1793.1496939031.git.leonard.crestez@nxp.com> <1497005895.28352.88.camel@nxp.com> <20170609154638.3b64e6d0@karo-electronics.de> <1497022484.28352.105.camel@nxp.com> <20170612124029.1643469d@karo-electronics.de> <1497268028.32422.15.camel@nxp.com> Message-ID: <20170612153752.3b71516c@karo-electronics.de> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org Hi, On Mon, 12 Jun 2017 10:22:45 -0300 Fabio Estevam wrote: > On Mon, Jun 12, 2017 at 8:47 AM, Leonard Crestez > wrote: > > > However it seems that this might be accidental, it just happens that > > the OCOTP clock starts as enabled and is only disabled later in the > > Most likely because U-Boot enabled the OCOTP clock as it reads the > speed grading fuse. > No, the imx6q_opp_check_speed_grading() runs on an i.MX6Q which, as mentioned in my other mail <20170612124029.1643469d@karo-electronics.de>, does not require any clock to be enabled for accessing the OCOTP regs. Lothar Wa?mann From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752357AbdFLOYU convert rfc822-to-8bit (ORCPT ); Mon, 12 Jun 2017 10:24:20 -0400 Received: from smtprelay04.ispgateway.de ([80.67.31.42]:21146 "EHLO smtprelay04.ispgateway.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751974AbdFLOYT (ORCPT ); Mon, 12 Jun 2017 10:24:19 -0400 Date: Mon, 12 Jun 2017 15:37:52 +0200 From: Lothar =?UTF-8?B?V2HDn21hbm4=?= To: Fabio Estevam Cc: Leonard Crestez , Bai Ping , "linux-pm@vger.kernel.org" , Shawn Guo , linux-kernel , Eduardo Valentin , Sascha Hauer , Fabio Estevam , Zhang Rui , "linux-arm-kernel@lists.infradead.org" Subject: Re: [PATCH 2/2] ARM: dts: imx6ul: Add imx6ul-tempmon Message-ID: <20170612153752.3b71516c@karo-electronics.de> In-Reply-To: References: <7055ce6095c0b7f026ac6f0dc37e43fc5c0b1793.1496939031.git.leonard.crestez@nxp.com> <1497005895.28352.88.camel@nxp.com> <20170609154638.3b64e6d0@karo-electronics.de> <1497022484.28352.105.camel@nxp.com> <20170612124029.1643469d@karo-electronics.de> <1497268028.32422.15.camel@nxp.com> Organization: Ka-Ro electronics GmbH MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8BIT X-Df-Sender: bHdAa2Fyby1lbGVjdHJvbmljcy5kZQ== Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi, On Mon, 12 Jun 2017 10:22:45 -0300 Fabio Estevam wrote: > On Mon, Jun 12, 2017 at 8:47 AM, Leonard Crestez > wrote: > > > However it seems that this might be accidental, it just happens that > > the OCOTP clock starts as enabled and is only disabled later in the > > Most likely because U-Boot enabled the OCOTP clock as it reads the > speed grading fuse. > No, the imx6q_opp_check_speed_grading() runs on an i.MX6Q which, as mentioned in my other mail <20170612124029.1643469d@karo-electronics.de>, does not require any clock to be enabled for accessing the OCOTP regs. Lothar Waßmann