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From: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
To: Xiaoguang Chen <xiaoguang.chen@intel.com>
Cc: intel-gfx@lists.freedesktop.org, linux-kernel@vger.kernel.org,
	kraxel@redhat.com, intel-gvt-dev@lists.freedesktop.org,
	zhiyuan.lv@intel.com
Subject: Re: [PATCH v9 3/7] drm: Extend the drm format
Date: Thu, 15 Jun 2017 13:21:35 +0300	[thread overview]
Message-ID: <20170615102135.GT12629@intel.com> (raw)
In-Reply-To: <1497513611-2814-4-git-send-email-xiaoguang.chen@intel.com>

On Thu, Jun 15, 2017 at 04:00:07PM +0800, Xiaoguang Chen wrote:
> Add new drm format which will be used by GVT-g.
> 
> Signed-off-by: Xiaoguang Chen <xiaoguang.chen@intel.com>
> ---
>  include/uapi/drm/drm_fourcc.h | 4 ++++
>  1 file changed, 4 insertions(+)
> 
> diff --git a/include/uapi/drm/drm_fourcc.h b/include/uapi/drm/drm_fourcc.h
> index 55e3010..2681862 100644
> --- a/include/uapi/drm/drm_fourcc.h
> +++ b/include/uapi/drm/drm_fourcc.h
> @@ -113,6 +113,10 @@ extern "C" {
>  
>  #define DRM_FORMAT_AYUV		fourcc_code('A', 'Y', 'U', 'V') /* [31:0] A:Y:Cb:Cr 8:8:8:8 little endian */
>  
> +/* 64 bpp RGB */
> +#define DRM_FORMAT_XRGB161616  fourcc_code('X', 'R', '4', '8') /* [63:0] x:R:G:B 16:16:16:16 little endian */
> +#define DRM_FORMAT_XBGR161616  fourcc_code('X', 'B', '4', '8') /* [63:0] x:B:G:R 16:16:16:16 little endian */

Are these supposed to be the half float formats? If so the docs are
lacking. Also this sort of stuff must be sent to dri-devel for everyone
to see.

That said, I don't really like having them in any gvt code until
they're handled by the driver proper.

> +
>  /*
>   * 2 plane RGB + A
>   * index 0 = RGB plane, same format as the corresponding non _A8 format has
> -- 
> 2.7.4
> 
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx

-- 
Ville Syrjälä
Intel OTC
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

WARNING: multiple messages have this Message-ID (diff)
From: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
To: Xiaoguang Chen <xiaoguang.chen@intel.com>
Cc: alex.williamson@redhat.com, kraxel@redhat.com,
	chris@chris-wilson.co.uk, intel-gfx@lists.freedesktop.org,
	linux-kernel@vger.kernel.org, zhenyuw@linux.intel.com,
	zhiyuan.lv@intel.com, intel-gvt-dev@lists.freedesktop.org,
	zhi.a.wang@intel.com, kevin.tian@intel.com
Subject: Re: [Intel-gfx] [PATCH v9 3/7] drm: Extend the drm format
Date: Thu, 15 Jun 2017 13:21:35 +0300	[thread overview]
Message-ID: <20170615102135.GT12629@intel.com> (raw)
In-Reply-To: <1497513611-2814-4-git-send-email-xiaoguang.chen@intel.com>

On Thu, Jun 15, 2017 at 04:00:07PM +0800, Xiaoguang Chen wrote:
> Add new drm format which will be used by GVT-g.
> 
> Signed-off-by: Xiaoguang Chen <xiaoguang.chen@intel.com>
> ---
>  include/uapi/drm/drm_fourcc.h | 4 ++++
>  1 file changed, 4 insertions(+)
> 
> diff --git a/include/uapi/drm/drm_fourcc.h b/include/uapi/drm/drm_fourcc.h
> index 55e3010..2681862 100644
> --- a/include/uapi/drm/drm_fourcc.h
> +++ b/include/uapi/drm/drm_fourcc.h
> @@ -113,6 +113,10 @@ extern "C" {
>  
>  #define DRM_FORMAT_AYUV		fourcc_code('A', 'Y', 'U', 'V') /* [31:0] A:Y:Cb:Cr 8:8:8:8 little endian */
>  
> +/* 64 bpp RGB */
> +#define DRM_FORMAT_XRGB161616  fourcc_code('X', 'R', '4', '8') /* [63:0] x:R:G:B 16:16:16:16 little endian */
> +#define DRM_FORMAT_XBGR161616  fourcc_code('X', 'B', '4', '8') /* [63:0] x:B:G:R 16:16:16:16 little endian */

Are these supposed to be the half float formats? If so the docs are
lacking. Also this sort of stuff must be sent to dri-devel for everyone
to see.

That said, I don't really like having them in any gvt code until
they're handled by the driver proper.

> +
>  /*
>   * 2 plane RGB + A
>   * index 0 = RGB plane, same format as the corresponding non _A8 format has
> -- 
> 2.7.4
> 
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx

-- 
Ville Syrjälä
Intel OTC

  reply	other threads:[~2017-06-15 10:21 UTC|newest]

Thread overview: 100+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-06-15  8:00 [PATCH v9 0/7] drm/i915/gvt: Dma-buf support for GVT-g Xiaoguang Chen
2017-06-15  8:00 ` Xiaoguang Chen
2017-06-15  8:00 ` [PATCH v9 1/7] drm/i915/gvt: Extend the GVT-g architecture Xiaoguang Chen
2017-06-15  8:00 ` [PATCH v9 2/7] drm/i915/gvt: OpRegion support for GVT-g Xiaoguang Chen
2017-06-15  8:00   ` Xiaoguang Chen
2017-06-15  8:00 ` [PATCH v9 3/7] drm: Extend the drm format Xiaoguang Chen
2017-06-15  8:00   ` Xiaoguang Chen
2017-06-15 10:21   ` Ville Syrjälä [this message]
2017-06-15 10:21     ` [Intel-gfx] " Ville Syrjälä
2017-06-20  9:01     ` Zhang, Tina
2017-06-15  8:00 ` [PATCH v9 4/7] drm/i915/gvt: Frame buffer decoder support for GVT-g Xiaoguang Chen
2017-06-15  8:00   ` Xiaoguang Chen
2017-06-15  8:00 ` [PATCH v9 5/7] vfio: Define vfio based dma-buf operations Xiaoguang Chen
2017-06-15  8:00   ` Xiaoguang Chen
2017-06-15 14:51   ` Kirti Wankhede
2017-06-15 14:51     ` Kirti Wankhede
2017-06-15 16:00     ` Gerd Hoffmann
2017-06-15 16:00       ` Gerd Hoffmann
2017-06-15 20:38       ` Alex Williamson
2017-06-15 20:38         ` Alex Williamson
2017-06-16 10:24         ` Gerd Hoffmann
2017-06-16 12:52           ` Alex Williamson
2017-06-16 13:32         ` Kirti Wankhede
2017-06-16 13:32           ` Kirti Wankhede
2017-06-16 16:39           ` Alex Williamson
2017-06-16 16:39             ` Alex Williamson
2017-06-16 18:28             ` Kirti Wankhede
2017-06-16 18:28               ` Kirti Wankhede
2017-06-19  6:34             ` Gerd Hoffmann
2017-06-19 14:54               ` Alex Williamson
2017-06-19 14:54                 ` Alex Williamson
2017-06-20  8:35                 ` Gerd Hoffmann
2017-06-20  8:35                   ` Gerd Hoffmann
2017-06-20 13:55                   ` Kirti Wankhede
2017-06-20 13:55                     ` Kirti Wankhede
2017-06-21  7:22                     ` Gerd Hoffmann
2017-07-12 13:18                       ` Kirti Wankhede
2017-07-12 13:18                         ` Kirti Wankhede
2017-07-14  9:58                         ` Gerd Hoffmann
2017-07-14  9:58                           ` Gerd Hoffmann
2017-06-19  6:38           ` Gerd Hoffmann
2017-06-19 14:55             ` Alex Williamson
2017-06-19 14:55               ` Alex Williamson
2017-06-20  8:41               ` Zhang, Tina
2017-06-20  8:41                 ` [Intel-gfx] " Zhang, Tina
2017-06-20 10:57                 ` Gerd Hoffmann
2017-06-20 10:57                   ` [Intel-gfx] " Gerd Hoffmann
2017-06-20 15:00                   ` Alex Williamson
2017-06-20 17:07                     ` Kirti Wankhede
2017-06-20 17:07                       ` [Intel-gfx] " Kirti Wankhede
2017-06-20 23:01                     ` Zhang, Tina
2017-06-20 23:01                       ` [Intel-gfx] " Zhang, Tina
2017-06-20 23:22                       ` Alex Williamson
2017-06-20 23:22                         ` [Intel-gfx] " Alex Williamson
2017-06-21  9:20                         ` Zhang, Tina
2017-06-21  9:20                           ` [Intel-gfx] " Zhang, Tina
2017-06-21 11:03                           ` Gerd Hoffmann
2017-06-21 18:59                             ` Alex Williamson
2017-06-22  8:30                               ` Gerd Hoffmann
2017-06-22  8:30                                 ` [Intel-gfx] " Gerd Hoffmann
2017-06-22 18:54                                 ` Alex Williamson
2017-06-22 18:54                                   ` [Intel-gfx] " Alex Williamson
2017-06-23  7:26                                   ` Gerd Hoffmann
2017-06-23  7:26                                     ` [Intel-gfx] " Gerd Hoffmann
2017-06-23  7:49                                     ` Zhi Wang
2017-06-23  7:49                                       ` Zhi Wang
2017-06-23  8:31                                       ` Gerd Hoffmann
2017-06-23 16:40                                         ` Alex Williamson
2017-06-23 16:40                                           ` [Intel-gfx] " Alex Williamson
2017-06-23 17:15                                     ` Alex Williamson
2017-06-23 17:15                                       ` [Intel-gfx] " Alex Williamson
2017-06-26  6:17                                       ` Gerd Hoffmann
2017-06-26  6:17                                         ` [Intel-gfx] " Gerd Hoffmann
2017-06-22  0:21                             ` Zhang, Tina
2017-06-22  0:21                               ` [Intel-gfx] " Zhang, Tina
2017-06-21  7:34                     ` Gerd Hoffmann
2017-06-21  7:34                       ` [Intel-gfx] " Gerd Hoffmann
2017-06-23 21:58                   ` Zhang, Tina
2017-06-23 21:58                     ` [Intel-gfx] " Zhang, Tina
2017-06-26  6:39                     ` Gerd Hoffmann
2017-06-26  6:39                       ` [Intel-gfx] " Gerd Hoffmann
2017-06-26 17:28                       ` Alex Williamson
2017-06-26 17:28                         ` [Intel-gfx] " Alex Williamson
2017-06-27  6:12                         ` Gerd Hoffmann
2017-06-27  6:12                           ` [Intel-gfx] " Gerd Hoffmann
2017-06-28 12:48                           ` Zhang, Tina
2017-06-28 12:48                             ` [Intel-gfx] " Zhang, Tina
2017-06-29  6:41                             ` Gerd Hoffmann
2017-06-29  6:41                               ` [Intel-gfx] " Gerd Hoffmann
2017-06-29  8:39                               ` Daniel Vetter
2017-06-29  8:39                                 ` [Intel-gfx] " Daniel Vetter
2017-07-04  0:47                                 ` Zhang, Tina
2017-07-04  0:47                                   ` [Intel-gfx] " Zhang, Tina
2017-06-20 13:35               ` Kirti Wankhede
2017-06-20 13:35                 ` Kirti Wankhede
2017-06-15  8:00 ` [PATCH v9 6/7] drm/i915/gvt: Dmabuf support for GVT-g Xiaoguang Chen
2017-06-15  8:00   ` Xiaoguang Chen
2017-06-15  8:00 ` [PATCH v9 7/7] drm/i915/gvt: Adding user interface for dma-buf Xiaoguang Chen
2017-06-15  8:00   ` Xiaoguang Chen
2017-06-15  8:03 ` ✗ Fi.CI.BAT: failure for drm/i915/gvt: dma-buf support for GVT-g (rev9) Patchwork

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