From mboxrd@z Thu Jan 1 00:00:00 1970 From: Alex Williamson Subject: Re: [PATCH v9 5/7] vfio: Define vfio based dma-buf operations Date: Mon, 19 Jun 2017 08:54:09 -0600 Message-ID: <20170619085409.26f5c14c@w520.home> References: <1497513611-2814-1-git-send-email-xiaoguang.chen@intel.com> <1497513611-2814-6-git-send-email-xiaoguang.chen@intel.com> <1497542438.29252.1.camel@redhat.com> <20170615143833.7526351b@w520.home> <24c4880b-24f5-ea07-834c-c77d3e895c78@nvidia.com> <20170616103959.3b6f1681@t450s.home> <1497854053.4207.2.camel@redhat.com> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Return-path: In-Reply-To: <1497854053.4207.2.camel@redhat.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" To: Gerd Hoffmann Cc: intel-gfx@lists.freedesktop.org, linux-kernel@vger.kernel.org, Kirti Wankhede , Xiaoguang Chen , intel-gvt-dev@lists.freedesktop.org, zhiyuan.lv@intel.com List-Id: intel-gfx@lists.freedesktop.org T24gTW9uLCAxOSBKdW4gMjAxNyAwODozNDoxMyArMDIwMApHZXJkIEhvZmZtYW5uIDxrcmF4ZWxA cmVkaGF0LmNvbT4gd3JvdGU6Cgo+ICAgSGksCj4gCj4gPiBTbyBwZXJoYXBzIHRoaXMgYmVjb21l czoKPiA+IAo+ID4gc3RydWN0IHZmaW9fZGV2aWNlX2dmeF9wbGFuZV9pbmZvIHsKPiA+IAlfX3U2 NCBzdGFydDsKPiA+IAlfX3U2NCBkcm1fZm9ybWF0X21vZDsKPiA+IAlfX3UzMiBkcm1fZm9ybWF0 Owo+ID4gCV9fdTMyIHdpZHRoOwo+ID4gCV9fdTMyIGhlaWdodDsKPiA+IAlfX3UzMiBzdHJpZGU7 Cj4gPiAJX191MzIgc2l6ZTsKPiA+IAlfX3UzMiB4X3BvczsKPiA+IAlfX3UzMiB5X3BvczsKPiA+ IH07ICAKPiAKPiBMb29rcyBnb29kLgo+IAo+ID4gc3RydWN0IHZmaW9fZGV2aWNlX3F1ZXJ5X2dm eF9wbGFuZSB7Cj4gPiAJX191MzIgYXJnc3o7Cj4gPiAJX191MzIgZmxhZ3M7Cj4gPiAjZGVmaW5l IFZGSU9fR0ZYX1BMQU5FX0ZMQUdTX1JFR0lPTl9JRAkJKDEgPDwgMCkKPiA+ICNkZWZpbmUgVkZJ T19HRlhfUExBTkVfRkxBR1NfUExBTkVfSUQJCSgxIDw8IDEpCj4gPiAJc3RydWN0IHZmaW9fZGV2 aWNlX2dmeF9wbGFuZV9pbmZvIHBsYW5lX2luZm87Cj4gPiAJX191MzIgaWQ7wqAKPiA+IH07ICAK PiAKPiBIbW0sIHBsYW5lIGlzbid0IHJlYWxseSBhbiBJRCwgaXQgaXMgYSB0eXBlLCB3aXRoIHR5 cGUgYmVpbmcgZWl0aGVyCj4gRFJNX1BMQU5FX1RZUEVfUFJJTUFSWSBvciBEUk1fUExBTkVfVFlQ RV9DVVJTT1IsIHNvIEkgZG9uJ3QgdGhpbmsgdGhlCj4gZmxhZ2UgYWJvdmUgbWFrZSBzZW5zZS4K ClRoZSBpbnRlbnRpb24gd2FzIHRoYXQgLi4uX1JFR0lPTl9JRCBhbmQgLi4uUExBTkVfSUQgYXJl IGRlc2NyaWJpbmcKd2hhdCB0aGUgdmZpb19kZXZpY2VfcXVlcnlfZ2Z4X3BsYW5lLmlkIGZpZWxk IHJlcHJlc2VudHMsIGVpdGhlciBhCnJlZ2lvbiBpbmRleCBvciBhIHBsYW5lIGlkZW50aWZpZXIu ICBUaGUgdHlwZSBvZiBwbGFuZSB3b3VsZCBiZQpyZXByZXNlbnRlZCB3aXRoaW4gdGhlIHZmaW9f ZGV2aWNlX2dmeF9wbGFuZV9pbmZvIHN0cnVjdC4KCj4gV2hhdCBhcmUgdGhlIG52aWRpYSBwbGFu ZSBmb3IgY3Vyc29yIHN1cHBvcnQgYnR3Pwo+IAo+ID4gVGhlIGZsYWcgZGVmaW5lcyB0aGUgZGF0 YSBpbiB0aGUgaWQgZmllbGQgYXMgZWl0aGVyIHJlZmVycmluZyB0byBhCj4gPiByZWdpb24gKHBl cmhhcHMgdGhlcmUgY291bGQgYmUgbXVsdGlwbGUgcmVnaW9ucyB3aXRoIG9ubHkgb25lIGFjdGl2 ZSkgIAo+IAo+IFdlbGwsIHdlIGhhdmUgYSAic3RhcnQiIGZpZWxkIGluIHZmaW9fZGV2aWNlX2dm eF9wbGFuZV9pbmZvIChtYXliZSB3ZQo+IHNob3VsZCByZW5hbWUgdGhhdCB0byAib2Zmc2V0Iiks IHdoaWNoIGNhbiBiZSB1c2VkIHRvIHBsYWNlIG11bHRpcGxlCj4gcGxhbmVzIGludG8gYSBzaW5n bGUsIGZpeGVkIHJlZ2lvbi4KClRoYXQgc2VlbXMgcmVhc29uYWJsZS4KIAo+IEFsc28gSSB0aGlu ayBpdCB3b3VsZCBiZSB1c2VmdWwgdG8gaGF2ZSBzb21lIHdheSB0byBmaWd1cmUgdGhlIGRldmlj ZQo+IGNhcGFiaWxpdGllcyBhcyB0aGUgdXNlcnNwYWNlIHdvcmtmbG93IHdpbGwgbG9vayBxdWl0 ZSBkaWZmZXJlbnQgZm9yCj4gdGhlIHR3byBjYXNlcy4KCkluIHRoZSByZWdpb24gY2FzZSwgVkZJ T19ERVZJQ0VfR0VUX1JFR0lPTl9JTkZPIHdvdWxkIGluY2x1ZGUgYSBkZXZpY2UKc3BlY2lmaWMg cmVnaW9uIHdpdGggYSBob3BlZnVsbHkgY29tbW9uIGlkZW50aWZpZXIgdG8gaWRlbnRpZnkgaXQg YXMgYQpncmFwaGljcyBmcmFtZWJ1ZmZlci4gIFZGSU9fREVWSUNFX1FVRVJZX0dGWF9QTEFORSB3 b3VsZCBpbmRpY2F0ZSB0aGUKcGxhbmUgYXMgYSByZWdpb24gaW5kZXguCgpJbiB0aGUgZG1hYnVm IGNhc2UsIFZGSU9fREVWSUNFX1FVRVJZX0dGWF9QTEFORSB3b3VsZCBpbmRpY2F0ZSB0aGUKcGxh bmUgYXMgYSAicGxhbmUgSUQiIGFuZCBzb21lIHNvcnQgb2YKVkZJT19ERVZJQ0VfR0VUX0dGWF9Q TEFORShWRklPX0dGWF9UWVBFX0RNQUJVRikgaW9jdGwgd291bGQgYmUKbmVjZXNzYXJ5IHRvIGdl dCBhIGZpbGUgZGVzY3JpcHRvciB0byB0aGF0IHBsYW5lLgoKV2hhdCBlbHNlIGFyZSB5b3UgdGhp bmtpbmcgd2UgbmVlZD8gIFRoYW5rcywKCkFsZXgKX19fX19fX19fX19fX19fX19fX19fX19fX19f X19fX19fX19fX19fX19fX19fX18KSW50ZWwtZ2Z4IG1haWxpbmcgbGlzdApJbnRlbC1nZnhAbGlz dHMuZnJlZWRlc2t0b3Aub3JnCmh0dHBzOi8vbGlzdHMuZnJlZWRlc2t0b3Aub3JnL21haWxtYW4v bGlzdGluZm8vaW50ZWwtZ2Z4Cg== From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751895AbdFSOyO convert rfc822-to-8bit (ORCPT ); Mon, 19 Jun 2017 10:54:14 -0400 Received: from mx1.redhat.com ([209.132.183.28]:54336 "EHLO mx1.redhat.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751768AbdFSOyN (ORCPT ); Mon, 19 Jun 2017 10:54:13 -0400 DMARC-Filter: OpenDMARC Filter v1.3.2 mx1.redhat.com 773A480C18 Authentication-Results: ext-mx02.extmail.prod.ext.phx2.redhat.com; dmarc=none (p=none dis=none) header.from=redhat.com Authentication-Results: ext-mx02.extmail.prod.ext.phx2.redhat.com; spf=pass smtp.mailfrom=alex.williamson@redhat.com DKIM-Filter: OpenDKIM Filter v2.11.0 mx1.redhat.com 773A480C18 Date: Mon, 19 Jun 2017 08:54:09 -0600 From: Alex Williamson To: Gerd Hoffmann Cc: Kirti Wankhede , Xiaoguang Chen , chris@chris-wilson.co.uk, intel-gfx@lists.freedesktop.org, linux-kernel@vger.kernel.org, zhenyuw@linux.intel.com, zhiyuan.lv@intel.com, intel-gvt-dev@lists.freedesktop.org, zhi.a.wang@intel.com, kevin.tian@intel.com Subject: Re: [PATCH v9 5/7] vfio: Define vfio based dma-buf operations Message-ID: <20170619085409.26f5c14c@w520.home> In-Reply-To: <1497854053.4207.2.camel@redhat.com> References: <1497513611-2814-1-git-send-email-xiaoguang.chen@intel.com> <1497513611-2814-6-git-send-email-xiaoguang.chen@intel.com> <1497542438.29252.1.camel@redhat.com> <20170615143833.7526351b@w520.home> <24c4880b-24f5-ea07-834c-c77d3e895c78@nvidia.com> <20170616103959.3b6f1681@t450s.home> <1497854053.4207.2.camel@redhat.com> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8BIT X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.26]); Mon, 19 Jun 2017 14:54:12 +0000 (UTC) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Mon, 19 Jun 2017 08:34:13 +0200 Gerd Hoffmann wrote: > Hi, > > > So perhaps this becomes: > > > > struct vfio_device_gfx_plane_info { > > __u64 start; > > __u64 drm_format_mod; > > __u32 drm_format; > > __u32 width; > > __u32 height; > > __u32 stride; > > __u32 size; > > __u32 x_pos; > > __u32 y_pos; > > }; > > Looks good. > > > struct vfio_device_query_gfx_plane { > > __u32 argsz; > > __u32 flags; > > #define VFIO_GFX_PLANE_FLAGS_REGION_ID (1 << 0) > > #define VFIO_GFX_PLANE_FLAGS_PLANE_ID (1 << 1) > > struct vfio_device_gfx_plane_info plane_info; > > __u32 id;  > > }; > > Hmm, plane isn't really an ID, it is a type, with type being either > DRM_PLANE_TYPE_PRIMARY or DRM_PLANE_TYPE_CURSOR, so I don't think the > flage above make sense. The intention was that ..._REGION_ID and ...PLANE_ID are describing what the vfio_device_query_gfx_plane.id field represents, either a region index or a plane identifier. The type of plane would be represented within the vfio_device_gfx_plane_info struct. > What are the nvidia plane for cursor support btw? > > > The flag defines the data in the id field as either referring to a > > region (perhaps there could be multiple regions with only one active) > > Well, we have a "start" field in vfio_device_gfx_plane_info (maybe we > should rename that to "offset"), which can be used to place multiple > planes into a single, fixed region. That seems reasonable. > Also I think it would be useful to have some way to figure the device > capabilities as the userspace workflow will look quite different for > the two cases. In the region case, VFIO_DEVICE_GET_REGION_INFO would include a device specific region with a hopefully common identifier to identify it as a graphics framebuffer. VFIO_DEVICE_QUERY_GFX_PLANE would indicate the plane as a region index. In the dmabuf case, VFIO_DEVICE_QUERY_GFX_PLANE would indicate the plane as a "plane ID" and some sort of VFIO_DEVICE_GET_GFX_PLANE(VFIO_GFX_TYPE_DMABUF) ioctl would be necessary to get a file descriptor to that plane. What else are you thinking we need? Thanks, Alex