From: Stephen Boyd <sboyd@codeaurora.org>
To: Stefan Agner <stefan@agner.ch>
Cc: shawnguo@kernel.org, kernel@pengutronix.de, aisheng.dong@nxp.com,
dwmw2@infradead.org, computersforpeace@gmail.com,
boris.brezillon@free-electrons.com, marek.vasut@gmail.com,
richard@nod.at, robh+dt@kernel.org, mark.rutland@arm.com,
han.xu@nxp.com, fabio.estevam@freescale.com,
LW@KARO-electronics.de, linux-mtd@lists.infradead.org,
devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH v6 1/3] clk: imx7d: create clocks behind rawnand clock gate
Date: Mon, 19 Jun 2017 18:01:25 -0700 [thread overview]
Message-ID: <20170620010125.GI20170@codeaurora.org> (raw)
In-Reply-To: <8b9edf13938e3166081e72ba8fa4ac822035079c.1496961128.git-series.stefan@agner.ch>
On 06/08, Stefan Agner wrote:
> The rawnand clock gate gates two clocks, NAND_USDHC_BUS_CLK_ROOT
> and NAND_CLK_ROOT. However, the gate has been in the chain of the
> latter only. This does not allow to use the NAND_USDHC_BUS_CLK_ROOT
> only, e.g. as required by APBH-Bridge-DMA.
>
> Add new clocks which represent the clock after the gate, and use a
> shared clock gate to correctly model the hardware.
>
> Signed-off-by: Stefan Agner <stefan@agner.ch>
> Tested-by: Fabio Estevam <fabio.estevam@nxp.com>
> ---
Applied to clk-next
--
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project
WARNING: multiple messages have this Message-ID (diff)
From: sboyd@codeaurora.org (Stephen Boyd)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v6 1/3] clk: imx7d: create clocks behind rawnand clock gate
Date: Mon, 19 Jun 2017 18:01:25 -0700 [thread overview]
Message-ID: <20170620010125.GI20170@codeaurora.org> (raw)
In-Reply-To: <8b9edf13938e3166081e72ba8fa4ac822035079c.1496961128.git-series.stefan@agner.ch>
On 06/08, Stefan Agner wrote:
> The rawnand clock gate gates two clocks, NAND_USDHC_BUS_CLK_ROOT
> and NAND_CLK_ROOT. However, the gate has been in the chain of the
> latter only. This does not allow to use the NAND_USDHC_BUS_CLK_ROOT
> only, e.g. as required by APBH-Bridge-DMA.
>
> Add new clocks which represent the clock after the gate, and use a
> shared clock gate to correctly model the hardware.
>
> Signed-off-by: Stefan Agner <stefan@agner.ch>
> Tested-by: Fabio Estevam <fabio.estevam@nxp.com>
> ---
Applied to clk-next
--
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project
next prev parent reply other threads:[~2017-06-20 1:01 UTC|newest]
Thread overview: 30+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-06-08 22:34 [PATCH v6 0/3] ARM: dts: imx7: add NAND support Stefan Agner
2017-06-08 22:34 ` Stefan Agner
2017-06-08 22:34 ` [PATCH v6 1/3] clk: imx7d: create clocks behind rawnand clock gate Stefan Agner
2017-06-08 22:34 ` Stefan Agner
2017-06-08 22:34 ` Stefan Agner
2017-06-09 19:16 ` Han Xu
2017-06-09 19:16 ` Han Xu
2017-06-09 19:16 ` Han Xu
2017-06-09 19:16 ` Han Xu
2017-06-20 1:01 ` Stephen Boyd [this message]
2017-06-20 1:01 ` Stephen Boyd
2017-06-08 22:34 ` [PATCH v6 2/3] ARM: dts: imx7: add GPMI NAND and APBH DMA Stefan Agner
2017-06-08 22:34 ` Stefan Agner
2017-06-09 19:17 ` Han Xu
2017-06-09 19:17 ` Han Xu
2017-06-09 19:17 ` Han Xu
2017-06-09 19:17 ` Han Xu
2017-06-08 22:34 ` [PATCH v6 3/3] ARM: dts: imx7-colibri: add NAND support Stefan Agner
2017-06-08 22:34 ` Stefan Agner
2017-06-09 19:17 ` Han Xu
2017-06-09 19:17 ` Han Xu
2017-06-09 19:17 ` Han Xu
2017-06-09 19:17 ` Han Xu
2017-06-14 15:11 ` [PATCH v6 0/3] ARM: dts: imx7: " Shawn Guo
2017-06-14 15:11 ` Shawn Guo
2017-08-02 2:41 ` Stefan Agner
2017-08-02 2:41 ` Stefan Agner
2017-08-03 1:13 ` Shawn Guo
2017-08-03 1:13 ` Shawn Guo
2017-08-03 1:13 ` Shawn Guo
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