diff for duplicates of <20170620180101.GD28035@arm.com> diff --git a/a/1.txt b/N1/1.txt index 67242ee..38f8808 100644 --- a/a/1.txt +++ b/N1/1.txt @@ -1,11 +1,11 @@ On Tue, Jun 20, 2017 at 07:47:37PM +0530, Geetha sowjanya wrote: -> From: Linu Cherian <linu.cherian(a)cavium.com> +> From: Linu Cherian <linu.cherian@cavium.com> > > Cavium ThunderX2 implementation doesn't support second page in SMMU > register space. Hence, resource size is set as 64k for this model. > -> Signed-off-by: Linu Cherian <linu.cherian(a)cavium.com> -> Signed-off-by: Geetha Sowjanya <geethasowjanya.akula(a)cavium.com> +> Signed-off-by: Linu Cherian <linu.cherian@cavium.com> +> Signed-off-by: Geetha Sowjanya <geethasowjanya.akula@cavium.com> > --- > drivers/acpi/arm64/iort.c | 15 ++++++++++++++- > 1 files changed, 14 insertions(+), 1 deletions(-) diff --git a/a/content_digest b/N1/content_digest index 0fe879b..6485000 100644 --- a/a/content_digest +++ b/N1/content_digest @@ -1,17 +1,40 @@ - "From\0Will Deacon <will.deacon at arm.com>\0" - "Subject\0Re: [Devel] [PATCH v8 1/3] ACPI/IORT: Fixup SMMUv3 resource size for Cavium ThunderX2 SMMUv3 model\0" + "ref\01497968259-16390-1-git-send-email-gakula@caviumnetworks.com\0" + "ref\01497968259-16390-2-git-send-email-gakula@caviumnetworks.com\0" + "From\0Will Deacon <will.deacon@arm.com>\0" + "Subject\0Re: [PATCH v8 1/3] ACPI/IORT: Fixup SMMUv3 resource size for Cavium ThunderX2 SMMUv3 model\0" "Date\0Tue, 20 Jun 2017 19:01:02 +0100\0" - "To\0devel@acpica.org\0" - "\01:1\0" + "To\0Geetha sowjanya <gakula@caviumnetworks.com>\0" + "Cc\0robin.murphy@arm.com" + lorenzo.pieralisi@arm.com + hanjun.guo@linaro.org + sudeep.holla@arm.com + iommu@lists.linux-foundation.org + robert.moore@intel.com + lv.zheng@intel.com + rjw@rjwysocki.net + jcm@redhat.com + linux-kernel@vger.kernel.org + robert.richter@cavium.com + catalin.marinas@arm.com + sgoutham@cavium.com + linux-arm-kernel@lists.infradead.org + linux-acpi@vger.kernel.org + geethasowjanya.akula@gmail.com + devel@acpica.org + linu.cherian@cavium.com + Charles.Garcia-Tobin@arm.com + robh@kernel.org + " Geetha Sowjanya <geethasowjanya.akula@cavium.com>\0" + "\00:1\0" "b\0" "On Tue, Jun 20, 2017 at 07:47:37PM +0530, Geetha sowjanya wrote:\n" - "> From: Linu Cherian <linu.cherian(a)cavium.com>\n" + "> From: Linu Cherian <linu.cherian@cavium.com>\n" "> \n" "> Cavium ThunderX2 implementation doesn't support second page in SMMU\n" "> register space. Hence, resource size is set as 64k for this model.\n" "> \n" - "> Signed-off-by: Linu Cherian <linu.cherian(a)cavium.com>\n" - "> Signed-off-by: Geetha Sowjanya <geethasowjanya.akula(a)cavium.com>\n" + "> Signed-off-by: Linu Cherian <linu.cherian@cavium.com>\n" + "> Signed-off-by: Geetha Sowjanya <geethasowjanya.akula@cavium.com>\n" "> ---\n" "> drivers/acpi/arm64/iort.c | 15 ++++++++++++++-\n" "> 1 files changed, 14 insertions(+), 1 deletions(-)\n" @@ -20,4 +43,4 @@ "\n" Will -5dc14b7246c7d301e770ef843914c97d5f243c866777ee3747acbd1d99d51d1c +effdfaa627dce6946ff681ffef4495e0a630d08016d593cecf158982e9ab2c63
diff --git a/a/1.txt b/N2/1.txt index 67242ee..38f8808 100644 --- a/a/1.txt +++ b/N2/1.txt @@ -1,11 +1,11 @@ On Tue, Jun 20, 2017 at 07:47:37PM +0530, Geetha sowjanya wrote: -> From: Linu Cherian <linu.cherian(a)cavium.com> +> From: Linu Cherian <linu.cherian@cavium.com> > > Cavium ThunderX2 implementation doesn't support second page in SMMU > register space. Hence, resource size is set as 64k for this model. > -> Signed-off-by: Linu Cherian <linu.cherian(a)cavium.com> -> Signed-off-by: Geetha Sowjanya <geethasowjanya.akula(a)cavium.com> +> Signed-off-by: Linu Cherian <linu.cherian@cavium.com> +> Signed-off-by: Geetha Sowjanya <geethasowjanya.akula@cavium.com> > --- > drivers/acpi/arm64/iort.c | 15 ++++++++++++++- > 1 files changed, 14 insertions(+), 1 deletions(-) diff --git a/a/content_digest b/N2/content_digest index 0fe879b..92a269b 100644 --- a/a/content_digest +++ b/N2/content_digest @@ -1,17 +1,19 @@ - "From\0Will Deacon <will.deacon at arm.com>\0" - "Subject\0Re: [Devel] [PATCH v8 1/3] ACPI/IORT: Fixup SMMUv3 resource size for Cavium ThunderX2 SMMUv3 model\0" + "ref\01497968259-16390-1-git-send-email-gakula@caviumnetworks.com\0" + "ref\01497968259-16390-2-git-send-email-gakula@caviumnetworks.com\0" + "From\0will.deacon@arm.com (Will Deacon)\0" + "Subject\0[PATCH v8 1/3] ACPI/IORT: Fixup SMMUv3 resource size for Cavium ThunderX2 SMMUv3 model\0" "Date\0Tue, 20 Jun 2017 19:01:02 +0100\0" - "To\0devel@acpica.org\0" - "\01:1\0" + "To\0linux-arm-kernel@lists.infradead.org\0" + "\00:1\0" "b\0" "On Tue, Jun 20, 2017 at 07:47:37PM +0530, Geetha sowjanya wrote:\n" - "> From: Linu Cherian <linu.cherian(a)cavium.com>\n" + "> From: Linu Cherian <linu.cherian@cavium.com>\n" "> \n" "> Cavium ThunderX2 implementation doesn't support second page in SMMU\n" "> register space. Hence, resource size is set as 64k for this model.\n" "> \n" - "> Signed-off-by: Linu Cherian <linu.cherian(a)cavium.com>\n" - "> Signed-off-by: Geetha Sowjanya <geethasowjanya.akula(a)cavium.com>\n" + "> Signed-off-by: Linu Cherian <linu.cherian@cavium.com>\n" + "> Signed-off-by: Geetha Sowjanya <geethasowjanya.akula@cavium.com>\n" "> ---\n" "> drivers/acpi/arm64/iort.c | 15 ++++++++++++++-\n" "> 1 files changed, 14 insertions(+), 1 deletions(-)\n" @@ -20,4 +22,4 @@ "\n" Will -5dc14b7246c7d301e770ef843914c97d5f243c866777ee3747acbd1d99d51d1c +9ea9a8a284c32a84e30c64dbe7bb8edb307517f4836d2c66e4ca2b9f9198446c
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