diff for duplicates of <20170621090835.GD3768@arm.com> diff --git a/a/1.txt b/N1/1.txt index 3b655cf..22dde24 100644 --- a/a/1.txt +++ b/N1/1.txt @@ -1,9 +1,9 @@ Hi Geetha, On Wed, Jun 21, 2017 at 12:09:45PM +0530, Geetha Akula wrote: -> On Tue, Jun 20, 2017 at 11:30 PM, Will Deacon <will.deacon(a)arm.com> wrote: +> On Tue, Jun 20, 2017 at 11:30 PM, Will Deacon <will.deacon-5wv7dgnIgG8@public.gmane.org> wrote: > > On Tue, Jun 20, 2017 at 07:47:39PM +0530, Geetha sowjanya wrote: -> >> From: Geetha Sowjanya <geethasowjanya.akula(a)cavium.com> +> >> From: Geetha Sowjanya <geethasowjanya.akula-YGCgFSpz5w/QT0dZR+AlfA@public.gmane.org> > >> > >> Cavium ThunderX2 SMMU doesn't support MSI and also doesn't have unique irq > >> lines for gerror, eventq and cmdq-sync. @@ -11,7 +11,7 @@ On Wed, Jun 21, 2017 at 12:09:45PM +0530, Geetha Akula wrote: > >> SHARED_IRQ option is set as a errata workaround, which allows to share the irq > >> line by register single irq handler for all the interrupts. > >> -> >> Signed-off-by: Geetha sowjanya <gakula(a)caviumnetworks.com> +> >> Signed-off-by: Geetha sowjanya <gakula-M3mlKVOIwJVv6pq1l3V1OdBPR1lH4CV8@public.gmane.org> > >> --- > >> .../devicetree/bindings/iommu/arm,smmu-v3.txt | 5 ++ > >> drivers/iommu/arm-smmu-v3.c | 73 ++++++++++++++++---- diff --git a/a/content_digest b/N1/content_digest index 3a778fe..17451b7 100644 --- a/a/content_digest +++ b/N1/content_digest @@ -1,15 +1,39 @@ - "From\0Will Deacon <will.deacon at arm.com>\0" - "Subject\0Re: [Devel] [PATCH v8 3/3] iommu/arm-smmu-v3: Add workaround for Cavium ThunderX2 erratum #126\0" + "ref\01497968259-16390-1-git-send-email-gakula@caviumnetworks.com\0" + "ref\01497968259-16390-4-git-send-email-gakula@caviumnetworks.com\0" + "ref\020170620180038.GC28035@arm.com\0" + "ref\0CANHdaiYb8gG5+OjiSBkSGfyNnt4=WDze08qW1JXA9-F66HE9ZA@mail.gmail.com\0" + "ref\0CANHdaiYb8gG5+OjiSBkSGfyNnt4=WDze08qW1JXA9-F66HE9ZA-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org\0" + "From\0Will Deacon <will.deacon-5wv7dgnIgG8@public.gmane.org>\0" + "Subject\0Re: [PATCH v8 3/3] iommu/arm-smmu-v3: Add workaround for Cavium ThunderX2 erratum #126\0" "Date\0Wed, 21 Jun 2017 10:08:35 +0100\0" - "To\0devel@acpica.org\0" - "\01:1\0" + "To\0Geetha Akula <geethasowjanya.akula-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>\0" + "Cc\0Catalin Marinas <catalin.marinas-5wv7dgnIgG8@public.gmane.org>" + Geetha Sowjanya <geethasowjanya.akula-YGCgFSpz5w/QT0dZR+AlfA@public.gmane.org> + Robert Richter <robert.richter-YGCgFSpz5w/QT0dZR+AlfA@public.gmane.org> + Lv Zheng <lv.zheng-ral2JQCrhuEAvxtiuMwx3w@public.gmane.org> + Rob Herring <robh-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org> + Geetha sowjanya <gakula-M3mlKVOIwJVv6pq1l3V1OdBPR1lH4CV8@public.gmane.org> + Robert Moore <robert.moore-ral2JQCrhuEAvxtiuMwx3w@public.gmane.org> + linux-acpi-u79uwXL29TY76Z2rM5mHXA@public.gmane.org + Sunil Goutham <sgoutham-YGCgFSpz5w/QT0dZR+AlfA@public.gmane.org> + Charles Garcia-Tobin <Charles.Garcia-Tobin-5wv7dgnIgG8@public.gmane.org> + marc.zyngier-5wv7dgnIgG8@public.gmane.org + jcm-H+wXaHxf7aLQT0dZR+AlfA@public.gmane.org + Sudeep Holla <sudeep.holla-5wv7dgnIgG8@public.gmane.org> + linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org + devel-E0kO6a4B6psdnm+yROfE0A@public.gmane.org + Rafael J. Wysocki <rjw-LthD3rsA81gm4RdzfppkhA@public.gmane.org> + linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org + Linux IOMMU <iommu-cunTk1MwBs9QetFLy7KEm3xJsTq8ys+cHZ5vskTnxNA@public.gmane.org> + " Linu Cherian <linu.cherian-YGCgFSpz5w/QT0dZR+AlfA@public.gmane.org>\0" + "\00:1\0" "b\0" "Hi Geetha,\n" "\n" "On Wed, Jun 21, 2017 at 12:09:45PM +0530, Geetha Akula wrote:\n" - "> On Tue, Jun 20, 2017 at 11:30 PM, Will Deacon <will.deacon(a)arm.com> wrote:\n" + "> On Tue, Jun 20, 2017 at 11:30 PM, Will Deacon <will.deacon-5wv7dgnIgG8@public.gmane.org> wrote:\n" "> > On Tue, Jun 20, 2017 at 07:47:39PM +0530, Geetha sowjanya wrote:\n" - "> >> From: Geetha Sowjanya <geethasowjanya.akula(a)cavium.com>\n" + "> >> From: Geetha Sowjanya <geethasowjanya.akula-YGCgFSpz5w/QT0dZR+AlfA@public.gmane.org>\n" "> >>\n" "> >> Cavium ThunderX2 SMMU doesn't support MSI and also doesn't have unique irq\n" "> >> lines for gerror, eventq and cmdq-sync.\n" @@ -17,7 +41,7 @@ "> >> SHARED_IRQ option is set as a errata workaround, which allows to share the irq\n" "> >> line by register single irq handler for all the interrupts.\n" "> >>\n" - "> >> Signed-off-by: Geetha sowjanya <gakula(a)caviumnetworks.com>\n" + "> >> Signed-off-by: Geetha sowjanya <gakula-M3mlKVOIwJVv6pq1l3V1OdBPR1lH4CV8@public.gmane.org>\n" "> >> ---\n" "> >> .../devicetree/bindings/iommu/arm,smmu-v3.txt | 5 ++\n" "> >> drivers/iommu/arm-smmu-v3.c | 73 ++++++++++++++++----\n" @@ -71,4 +95,4 @@ "\n" Will -536fdea16ffd9d7f0d5ac86af59ca838a6ea40f886cedac12aaef59a4a68c5cf +4ddad501eaf8c8f510ee82d34d79f62c4b9cd5ddcbab6f65aaa6beec60cfcacf
diff --git a/a/1.txt b/N2/1.txt index 3b655cf..d81f8fc 100644 --- a/a/1.txt +++ b/N2/1.txt @@ -1,9 +1,9 @@ Hi Geetha, On Wed, Jun 21, 2017 at 12:09:45PM +0530, Geetha Akula wrote: -> On Tue, Jun 20, 2017 at 11:30 PM, Will Deacon <will.deacon(a)arm.com> wrote: +> On Tue, Jun 20, 2017 at 11:30 PM, Will Deacon <will.deacon@arm.com> wrote: > > On Tue, Jun 20, 2017 at 07:47:39PM +0530, Geetha sowjanya wrote: -> >> From: Geetha Sowjanya <geethasowjanya.akula(a)cavium.com> +> >> From: Geetha Sowjanya <geethasowjanya.akula@cavium.com> > >> > >> Cavium ThunderX2 SMMU doesn't support MSI and also doesn't have unique irq > >> lines for gerror, eventq and cmdq-sync. @@ -11,7 +11,7 @@ On Wed, Jun 21, 2017 at 12:09:45PM +0530, Geetha Akula wrote: > >> SHARED_IRQ option is set as a errata workaround, which allows to share the irq > >> line by register single irq handler for all the interrupts. > >> -> >> Signed-off-by: Geetha sowjanya <gakula(a)caviumnetworks.com> +> >> Signed-off-by: Geetha sowjanya <gakula@caviumnetworks.com> > >> --- > >> .../devicetree/bindings/iommu/arm,smmu-v3.txt | 5 ++ > >> drivers/iommu/arm-smmu-v3.c | 73 ++++++++++++++++---- diff --git a/a/content_digest b/N2/content_digest index 3a778fe..cdd0b41 100644 --- a/a/content_digest +++ b/N2/content_digest @@ -1,15 +1,19 @@ - "From\0Will Deacon <will.deacon at arm.com>\0" - "Subject\0Re: [Devel] [PATCH v8 3/3] iommu/arm-smmu-v3: Add workaround for Cavium ThunderX2 erratum #126\0" + "ref\01497968259-16390-1-git-send-email-gakula@caviumnetworks.com\0" + "ref\01497968259-16390-4-git-send-email-gakula@caviumnetworks.com\0" + "ref\020170620180038.GC28035@arm.com\0" + "ref\0CANHdaiYb8gG5+OjiSBkSGfyNnt4=WDze08qW1JXA9-F66HE9ZA@mail.gmail.com\0" + "From\0will.deacon@arm.com (Will Deacon)\0" + "Subject\0[PATCH v8 3/3] iommu/arm-smmu-v3: Add workaround for Cavium ThunderX2 erratum #126\0" "Date\0Wed, 21 Jun 2017 10:08:35 +0100\0" - "To\0devel@acpica.org\0" - "\01:1\0" + "To\0linux-arm-kernel@lists.infradead.org\0" + "\00:1\0" "b\0" "Hi Geetha,\n" "\n" "On Wed, Jun 21, 2017 at 12:09:45PM +0530, Geetha Akula wrote:\n" - "> On Tue, Jun 20, 2017 at 11:30 PM, Will Deacon <will.deacon(a)arm.com> wrote:\n" + "> On Tue, Jun 20, 2017 at 11:30 PM, Will Deacon <will.deacon@arm.com> wrote:\n" "> > On Tue, Jun 20, 2017 at 07:47:39PM +0530, Geetha sowjanya wrote:\n" - "> >> From: Geetha Sowjanya <geethasowjanya.akula(a)cavium.com>\n" + "> >> From: Geetha Sowjanya <geethasowjanya.akula@cavium.com>\n" "> >>\n" "> >> Cavium ThunderX2 SMMU doesn't support MSI and also doesn't have unique irq\n" "> >> lines for gerror, eventq and cmdq-sync.\n" @@ -17,7 +21,7 @@ "> >> SHARED_IRQ option is set as a errata workaround, which allows to share the irq\n" "> >> line by register single irq handler for all the interrupts.\n" "> >>\n" - "> >> Signed-off-by: Geetha sowjanya <gakula(a)caviumnetworks.com>\n" + "> >> Signed-off-by: Geetha sowjanya <gakula@caviumnetworks.com>\n" "> >> ---\n" "> >> .../devicetree/bindings/iommu/arm,smmu-v3.txt | 5 ++\n" "> >> drivers/iommu/arm-smmu-v3.c | 73 ++++++++++++++++----\n" @@ -71,4 +75,4 @@ "\n" Will -536fdea16ffd9d7f0d5ac86af59ca838a6ea40f886cedac12aaef59a4a68c5cf +8439af7b5f573fb06ad571a0d65266ce95f7adb03e0492952cd65e45b6389366
diff --git a/a/1.txt b/N3/1.txt index 3b655cf..d81f8fc 100644 --- a/a/1.txt +++ b/N3/1.txt @@ -1,9 +1,9 @@ Hi Geetha, On Wed, Jun 21, 2017 at 12:09:45PM +0530, Geetha Akula wrote: -> On Tue, Jun 20, 2017 at 11:30 PM, Will Deacon <will.deacon(a)arm.com> wrote: +> On Tue, Jun 20, 2017 at 11:30 PM, Will Deacon <will.deacon@arm.com> wrote: > > On Tue, Jun 20, 2017 at 07:47:39PM +0530, Geetha sowjanya wrote: -> >> From: Geetha Sowjanya <geethasowjanya.akula(a)cavium.com> +> >> From: Geetha Sowjanya <geethasowjanya.akula@cavium.com> > >> > >> Cavium ThunderX2 SMMU doesn't support MSI and also doesn't have unique irq > >> lines for gerror, eventq and cmdq-sync. @@ -11,7 +11,7 @@ On Wed, Jun 21, 2017 at 12:09:45PM +0530, Geetha Akula wrote: > >> SHARED_IRQ option is set as a errata workaround, which allows to share the irq > >> line by register single irq handler for all the interrupts. > >> -> >> Signed-off-by: Geetha sowjanya <gakula(a)caviumnetworks.com> +> >> Signed-off-by: Geetha sowjanya <gakula@caviumnetworks.com> > >> --- > >> .../devicetree/bindings/iommu/arm,smmu-v3.txt | 5 ++ > >> drivers/iommu/arm-smmu-v3.c | 73 ++++++++++++++++---- diff --git a/a/content_digest b/N3/content_digest index 3a778fe..c5a0672 100644 --- a/a/content_digest +++ b/N3/content_digest @@ -1,15 +1,41 @@ - "From\0Will Deacon <will.deacon at arm.com>\0" - "Subject\0Re: [Devel] [PATCH v8 3/3] iommu/arm-smmu-v3: Add workaround for Cavium ThunderX2 erratum #126\0" + "ref\01497968259-16390-1-git-send-email-gakula@caviumnetworks.com\0" + "ref\01497968259-16390-4-git-send-email-gakula@caviumnetworks.com\0" + "ref\020170620180038.GC28035@arm.com\0" + "ref\0CANHdaiYb8gG5+OjiSBkSGfyNnt4=WDze08qW1JXA9-F66HE9ZA@mail.gmail.com\0" + "From\0Will Deacon <will.deacon@arm.com>\0" + "Subject\0Re: [PATCH v8 3/3] iommu/arm-smmu-v3: Add workaround for Cavium ThunderX2 erratum #126\0" "Date\0Wed, 21 Jun 2017 10:08:35 +0100\0" - "To\0devel@acpica.org\0" - "\01:1\0" + "To\0Geetha Akula <geethasowjanya.akula@gmail.com>\0" + "Cc\0Geetha sowjanya <gakula@caviumnetworks.com>" + Robin Murphy <robin.murphy@arm.com> + Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> + Hanjun Guo <hanjun.guo@linaro.org> + Sudeep Holla <sudeep.holla@arm.com> + Linux IOMMU <iommu@lists.linux-foundation.org> + Robert Moore <robert.moore@intel.com> + Lv Zheng <lv.zheng@intel.com> + Rafael J. Wysocki <rjw@rjwysocki.net> + jcm@redhat.com + linux-kernel@vger.kernel.org + Robert Richter <robert.richter@cavium.com> + Catalin Marinas <catalin.marinas@arm.com> + Sunil Goutham <sgoutham@cavium.com> + linux-arm-kernel@lists.infradead.org + linux-acpi@vger.kernel.org + devel@acpica.org + Linu Cherian <linu.cherian@cavium.com> + Charles Garcia-Tobin <Charles.Garcia-Tobin@arm.com> + Rob Herring <robh@kernel.org> + Geetha Sowjanya <geethasowjanya.akula@cavium.com> + " marc.zyngier@arm.com\0" + "\00:1\0" "b\0" "Hi Geetha,\n" "\n" "On Wed, Jun 21, 2017 at 12:09:45PM +0530, Geetha Akula wrote:\n" - "> On Tue, Jun 20, 2017 at 11:30 PM, Will Deacon <will.deacon(a)arm.com> wrote:\n" + "> On Tue, Jun 20, 2017 at 11:30 PM, Will Deacon <will.deacon@arm.com> wrote:\n" "> > On Tue, Jun 20, 2017 at 07:47:39PM +0530, Geetha sowjanya wrote:\n" - "> >> From: Geetha Sowjanya <geethasowjanya.akula(a)cavium.com>\n" + "> >> From: Geetha Sowjanya <geethasowjanya.akula@cavium.com>\n" "> >>\n" "> >> Cavium ThunderX2 SMMU doesn't support MSI and also doesn't have unique irq\n" "> >> lines for gerror, eventq and cmdq-sync.\n" @@ -17,7 +43,7 @@ "> >> SHARED_IRQ option is set as a errata workaround, which allows to share the irq\n" "> >> line by register single irq handler for all the interrupts.\n" "> >>\n" - "> >> Signed-off-by: Geetha sowjanya <gakula(a)caviumnetworks.com>\n" + "> >> Signed-off-by: Geetha sowjanya <gakula@caviumnetworks.com>\n" "> >> ---\n" "> >> .../devicetree/bindings/iommu/arm,smmu-v3.txt | 5 ++\n" "> >> drivers/iommu/arm-smmu-v3.c | 73 ++++++++++++++++----\n" @@ -71,4 +97,4 @@ "\n" Will -536fdea16ffd9d7f0d5ac86af59ca838a6ea40f886cedac12aaef59a4a68c5cf +4372d2c8e7a6d693fe6e322aabc76cda5b536db3737069ab6de29f7eed190a2d
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