From: Gautam Bhat <mindentropy@gmail.com>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCH 1/1] Set VLD04 output to 2.8V in PMIC initialization.
Date: Wed, 21 Jun 2017 21:48:27 +0530 [thread overview]
Message-ID: <20170621161827.2520-2-mindentropy@gmail.com> (raw)
In-Reply-To: <20170621161827.2520-1-mindentropy@gmail.com>
This change sets the VLDO4 settings output to 2.8V in PMIC
initialization so that the MIPI DSI and MIPI CSI input voltage
is 2.8V as per the schematics.
Signed-off-by: Gautam Bhat <mindentropy@gmail.com>
---
board/freescale/mx7dsabresd/mx7dsabresd.c | 10 ++++++++++
1 file changed, 10 insertions(+)
diff --git a/board/freescale/mx7dsabresd/mx7dsabresd.c b/board/freescale/mx7dsabresd/mx7dsabresd.c
index ecea5a529a..8df7ed575a 100644
--- a/board/freescale/mx7dsabresd/mx7dsabresd.c
+++ b/board/freescale/mx7dsabresd/mx7dsabresd.c
@@ -341,6 +341,7 @@ int power_init_board(void)
{
struct udevice *dev;
int ret, dev_id, rev_id;
+ uint regval;
ret = pmic_get("pfuze3000", &dev);
if (ret == -ENODEV)
@@ -354,6 +355,15 @@ int power_init_board(void)
pmic_clrsetbits(dev, PFUZE3000_LDOGCTL, 0, 1);
+ /*
+ * Set the voltage of VLDO4 output to 2.8V which feeds
+ * the MIPI DSI and MIPI CSI inputs.
+ */
+ regval = pmic_reg_read(dev, PFUZE3000_VLD4CTL);
+ regval &= ~(0xF);
+ regval |= 0xA; /* Set to 2.8V */
+ pmic_reg_write(dev, PFUZE3000_VLD4CTL, regval);
+
return 0;
}
#endif
--
2.11.0
next prev parent reply other threads:[~2017-06-21 16:18 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-06-21 16:18 [U-Boot] [PATCH 0/1] Set VLD04 output to 2.8V in PMIC initialization Gautam Bhat
2017-06-21 16:18 ` Gautam Bhat [this message]
2017-06-27 17:20 ` [U-Boot] [PATCH 1/1] " Otavio Salvador
2017-06-27 17:24 ` Fabio Estevam
2017-06-28 2:32 ` mind entropy
2017-06-28 14:13 ` Fabio Estevam
2017-07-03 17:55 ` Gautam Bhat
2017-07-03 18:07 ` Fabio Estevam
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