From: "Eduardo Habkost" <ehabkost@redhat.com>
To: Boqun Feng <boqun.feng@gmail.com>
Cc: qemu-devel@nongnu.org, Paolo Bonzini <pbonzini@redhat.com>,
Richard Henderson <rth@twiddle.net>
Subject: Re: [Qemu-devel] [PATCH] target-i386: add Skylake-Server cpu model
Date: Mon, 26 Jun 2017 21:41:31 -0300 [thread overview]
Message-ID: <20170627004131.GH12152@localhost.localdomain> (raw)
In-Reply-To: <20170626012144.3ucwsxfcchyba3wv@tardis>
On Mon, Jun 26, 2017 at 09:23:00AM +0800, Boqun Feng wrote:
> On Fri, Jun 23, 2017 at 10:38:14AM -0300, Eduardo Habkost wrote:
> > On Wed, Jun 21, 2017 at 01:29:34PM +0800, Boqun Feng (Intel) wrote:
> > > Introduce Skylake-Server cpu mode which inherits the features from
> > > Skylake-Client and supports some additional features that are: AVX512,
> > > CWLB and PGPE1GB.
> >
> > I will fix this to "CLWB" when applying the patch.
> >
>
> Oops.. thank you for pointing this out.
>
[...]
> >
> > I believe we should add the same comment about XSAVES from
> > Skylake-Cliente here, for consistency:
> >
> > /* Missing: XSAVES (not supported by some Linux versions,
> > * including v4.1 to v4.6).
> > * KVM doesn't yet expose any XSAVES state save component,
> > * and the only one defined in Skylake (processor tracing)
> > * probably will block migration anyway.
> > */
> >
>
> Make sense.
>
> > I can add it when applying the patch.
> >
>
> Please do, thanks! Or you prefer that I send out a V2 with typo fixed
> and comment added?
No need to send v2. I have already queued the patch + fixes on my
x86-next queue. Thanks.
--
Eduardo
prev parent reply other threads:[~2017-06-27 0:41 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-06-21 5:29 [Qemu-devel] [PATCH] target-i386: add Skylake-Server cpu model Boqun Feng (Intel)
2017-06-21 12:32 ` no-reply
2017-06-23 13:38 ` Eduardo Habkost
2017-06-23 14:06 ` Paolo Bonzini
2017-06-23 15:16 ` Eduardo Habkost
2017-06-26 1:23 ` Boqun Feng
2017-06-27 0:41 ` Eduardo Habkost [this message]
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