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From: Yi Sun <yi.y.sun@linux.intel.com>
To: Jan Beulich <jbeulich@suse.com>
Cc: kevin.tian@intel.com, wei.liu2@citrix.com,
	he.chen@linux.intel.com, andrew.cooper3@citrix.com,
	dario.faggioli@citrix.com, ian.jackson@eu.citrix.com,
	mengxu@cis.upenn.edu, xen-devel@lists.xenproject.org,
	chao.p.peng@linux.intel.com, roger.pau@citrix.com
Subject: Re: [PATCH v12 16/23] x86: L2 CAT: implement CPU init flow.
Date: Fri, 30 Jun 2017 15:27:53 +0800	[thread overview]
Message-ID: <20170630072753.GH3420@yi.y.sun> (raw)
In-Reply-To: <5955F6A7020000780010187A@prv-mh.provo.novell.com>

On 17-06-30 00:58:47, Jan Beulich wrote:
> >>> Yi Sun <yi.y.sun@linux.intel.com> 06/14/17 3:26 AM >>>
> > @@ -279,10 +281,14 @@ static void cat_init_feature(const struct cpuid_leaf *regs,
> >      switch ( type )
> >      {
> >      case PSR_SOCKET_L3_CAT:
> > +    case PSR_SOCKET_L2_CAT:
> >          /* cos=0 is reserved as default cbm(all bits within cbm_len are 1). */
> >          feat->cos_reg_val[0] = cat_default_val(feat->cbm_len);
> >  
> > -        wrmsrl(MSR_IA32_PSR_L3_MASK(0), cat_default_val(feat->cbm_len));
> > +        if ( type == PSR_SOCKET_L3_CAT )
> > +            wrmsrl(MSR_IA32_PSR_L3_MASK(0), cat_default_val(feat->cbm_len));
> > +        else
> > +            wrmsrl(MSR_IA32_PSR_L2_MASK(0), cat_default_val(feat->cbm_len));
> 
> Once again I think a conditional expression would yield in easier to read code,
> as that would make even more obvious that the second argument is the same for
> both cases.
> 
Ok, will use conditional expression here to make codes clearer.

> > @@ -317,7 +323,8 @@ static void cat_init_feature(const struct cpuid_leaf *regs,
> >          return;
> >  
> >      printk(XENLOG_INFO "%s: enabled on socket %u, cos_max:%u, cbm_len:%u\n",
> > -           ((type == PSR_SOCKET_L3_CDP) ? "CDP" : "L3 CAT"),
> > +           ((type == PSR_SOCKET_L3_CDP) ? "CDP" :
> > +            ((type == PSR_SOCKET_L3_CAT) ? "L3 CAT": "L2 CAT")),
> 
> At this point it would probably be better to have a static const lookup array
> for the types, or for this descriptive string to be passed into the function.
> 
Got it.

> > @@ -375,6 +382,12 @@ static const struct feat_props l3_cdp_props = {
> >      .write_msr = l3_cdp_write_msr,
> >  };
> >  
> > +/* L2 CAT props */
> > +static const struct feat_props l2_cat_props = {
> > +    .cos_num = 1,
> > +    .type[0] = PSR_CBM_TYPE_L2,
> > +};
> 
> Same remark as for CDP regarding the NULL function pointers left around here
> until the later patches populate them.
> 
Will highlight it in comments.

> > @@ -1407,6 +1424,19 @@ static void psr_cpu_init(void)
> >          info->feat_init = true;
> >      }
> >  
> > +    cpuid_count_leaf(PSR_CPUID_LEVEL_CAT, 0, ®s);
> > +    if ( regs.b & PSR_RESOURCE_TYPE_L2 )
> > +    {
> > +        cpuid_count_leaf(PSR_CPUID_LEVEL_CAT, 2, ®s);
> > +
> > +        feat = feat_l2_cat;
> > +        feat_l2_cat = NULL;
> > +        feat_props[PSR_SOCKET_L2_CAT] = &l2_cat_props;
> > +        cat_init_feature(®s, feat, info, PSR_SOCKET_L2_CAT);
> > +
> > +        info->feat_init = true;
> 
> This recurring setting of feat_init starts looking suspicious here. Why can't
> this be done once at the end of the function, outside of any if()-s?
> 
I am afraid there is no any feature found through CPUID so I set feat_init in
every statement that a feature is found.

> > --- a/xen/include/asm-x86/psr.h
> > +++ b/xen/include/asm-x86/psr.h
> > @@ -23,6 +23,7 @@
> >  
> >  /* Resource Type Enumeration */
> >  #define PSR_RESOURCE_TYPE_L3            0x2
> > +#define PSR_RESOURCE_TYPE_L2            0x4
> 
> These are used in psr.c only afaics, so shouldn't be put in a header.
> 
PSR_RESOURCE_TYPE_L3 is used in sysctl.c too. For L2, I just want to keep it
same place as L3.

> Jan

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  reply	other threads:[~2017-06-30  7:28 UTC|newest]

Thread overview: 67+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-06-14  1:12 [PATCH v12 00/23] Enable L2 Cache Allocation Technology & Refactor psr.c Yi Sun
2017-06-14  1:12 ` [PATCH v12 01/23] docs: create Cache Allocation Technology (CAT) and Code and Data Prioritization (CDP) feature document Yi Sun
2017-06-14  1:12 ` [PATCH v12 02/23] x86: move cpuid_count_leaf from cpuid.c to processor.h Yi Sun
2017-06-14  1:12 ` [PATCH v12 03/23] x86: refactor psr: remove L3 CAT/CDP codes Yi Sun
2017-06-14  1:12 ` [PATCH v12 04/23] x86: refactor psr: L3 CAT: implement main data structures, CPU init and free flows Yi Sun
2017-06-28  7:12   ` Jan Beulich
2017-06-28  9:07     ` Yi Sun
2017-06-14  1:12 ` [PATCH v12 05/23] x86: refactor psr: L3 CAT: implement Domain init/free and schedule flows Yi Sun
2017-06-28  7:13   ` Jan Beulich
2017-06-14  1:12 ` [PATCH v12 06/23] x86: refactor psr: L3 CAT: implement get hw info flow Yi Sun
2017-06-14  1:12 ` [PATCH v12 07/23] x86: refactor psr: L3 CAT: implement get value flow Yi Sun
2017-06-28  7:14   ` Jan Beulich
2017-06-14  1:12 ` [PATCH v12 08/23] x86: refactor psr: L3 CAT: set value: implement framework Yi Sun
2017-06-28  7:14   ` Jan Beulich
2017-06-28  9:09     ` Yi Sun
2017-06-28 11:43       ` Jan Beulich
2017-06-29  5:12         ` Yi Sun
2017-06-29  6:24           ` Jan Beulich
2017-06-29  7:21             ` Yi Sun
2017-06-14  1:12 ` [PATCH v12 09/23] x86: refactor psr: L3 CAT: set value: assemble features value array Yi Sun
2017-06-29 17:56   ` Jan Beulich
2017-06-14  1:12 ` [PATCH v12 10/23] x86: refactor psr: L3 CAT: set value: implement cos finding flow Yi Sun
2017-06-29 17:57   ` Jan Beulich
2017-06-14  1:12 ` [PATCH v12 11/23] x86: refactor psr: L3 CAT: set value: implement cos id picking flow Yi Sun
2017-06-29 17:59   ` Jan Beulich
2017-06-14  1:12 ` [PATCH v12 12/23] x86: refactor psr: L3 CAT: set value: implement write msr flow Yi Sun
2017-06-29 18:00   ` Jan Beulich
2017-06-30  5:45     ` Yi Sun
2017-06-30  6:45       ` Jan Beulich
2017-06-30  7:08         ` Yi Sun
2017-06-14  1:12 ` [PATCH v12 13/23] x86: refactor psr: CDP: implement CPU init flow Yi Sun
2017-06-30  6:40   ` Jan Beulich
2017-06-30  6:59     ` Yi Sun
2017-06-30  7:33       ` Jan Beulich
2017-06-30  8:04         ` Yi Sun
2017-06-30  9:18           ` Jan Beulich
2017-07-04  1:40             ` Yi Sun
2017-07-04  7:28               ` Jan Beulich
2017-07-05  1:45                 ` Yi Sun
2017-06-14  1:12 ` [PATCH v12 14/23] x86: refactor psr: CDP: implement get hw info flow Yi Sun
2017-06-30  6:41   ` Jan Beulich
2017-06-14  1:12 ` [PATCH v12 15/23] x86: refactor psr: CDP: implement set value callback function Yi Sun
2017-06-30  6:42   ` Jan Beulich
2017-06-30  7:22     ` Yi Sun
2017-06-30  8:54       ` Yi Sun
2017-06-30  9:33         ` Jan Beulich
2017-06-30 11:29           ` Yi Sun
2017-06-30 12:02             ` Jan Beulich
2017-07-03  6:33               ` Yi Sun
2017-07-03  7:01                 ` Jan Beulich
2017-07-03  8:40                   ` Yi Sun
2017-07-03  9:18                     ` Jan Beulich
2017-07-03 12:52                       ` Yi Sun
2017-07-03 13:02                         ` Jan Beulich
2017-06-14  1:12 ` [PATCH v12 16/23] x86: L2 CAT: implement CPU init flow Yi Sun
2017-06-30  6:58   ` Jan Beulich
2017-06-30  7:27     ` Yi Sun [this message]
2017-06-30  7:36       ` Jan Beulich
2017-06-30  8:05         ` Yi Sun
2017-06-14  1:12 ` [PATCH v12 17/23] x86: L2 CAT: implement get hw info flow Yi Sun
2017-06-30  6:59   ` Jan Beulich
2017-06-14  1:12 ` [PATCH v12 18/23] x86: L2 CAT: implement get value flow Yi Sun
2017-06-14  1:12 ` [PATCH v12 19/23] x86: L2 CAT: implement set " Yi Sun
2017-06-14  1:12 ` [PATCH v12 20/23] tools: L2 CAT: support get HW info for L2 CAT Yi Sun
2017-06-14  1:12 ` [PATCH v12 21/23] tools: L2 CAT: support show cbm " Yi Sun
2017-06-14  1:12 ` [PATCH v12 22/23] tools: L2 CAT: support set " Yi Sun
2017-06-14  1:12 ` [PATCH v12 23/23] docs: add L2 CAT description in docs Yi Sun

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