From: Gautam Bhat <mindentropy@gmail.com>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCH v3 1/1] mx7dsabresd: Set VLD04 output to 2.8V in PMIC initialization.
Date: Mon, 3 Jul 2017 00:50:32 +0530 [thread overview]
Message-ID: <20170702192032.14840-2-mindentropy@gmail.com> (raw)
In-Reply-To: <20170702192032.14840-1-mindentropy@gmail.com>
This change sets the VLDO4 settings output to 2.8V in PMIC
initialization so that the MIPI DSI/CSI input voltage is 2.8V
as per the schematics. The original code provides an output of
3.3V which violates the voltage mentioned in the schematics.
Signed-off-by: Gautam Bhat <mindentropy@gmail.com>
---
Changes in v3:
- Used pmic_clrsetbits for consistency.
board/freescale/mx7dsabresd/mx7dsabresd.c | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/board/freescale/mx7dsabresd/mx7dsabresd.c b/board/freescale/mx7dsabresd/mx7dsabresd.c
index ecea5a529a..7d22501d26 100644
--- a/board/freescale/mx7dsabresd/mx7dsabresd.c
+++ b/board/freescale/mx7dsabresd/mx7dsabresd.c
@@ -354,6 +354,12 @@ int power_init_board(void)
pmic_clrsetbits(dev, PFUZE3000_LDOGCTL, 0, 1);
+ /*
+ * Set the voltage of VLDO4 output to 2.8V which feeds
+ * the MIPI DSI and MIPI CSI inputs.
+ */
+ pmic_clrsetbits(dev, PFUZE3000_VLD4CTL, 0xF, 0xA);
+
return 0;
}
#endif
--
2.11.0
next prev parent reply other threads:[~2017-07-02 19:20 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-07-01 6:56 [U-Boot] [PATCH v2 0/1] mx7sabresd: Set VLD04 output to 2.8V in PMIC initialization Gautam Bhat
2017-07-01 6:56 ` [U-Boot] [PATCH v2 1/1] " Gautam Bhat
2017-07-01 15:18 ` Fabio Estevam
2017-07-02 19:20 ` [U-Boot] [PATCH v3 0/1] mx7dsabresd: " Gautam Bhat
2017-07-02 19:20 ` Gautam Bhat [this message]
2017-07-02 22:09 ` [U-Boot] [PATCH v3 1/1] " Fabio Estevam
2017-07-05 9:57 ` Stefano Babic
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