From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:58382) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dSDcu-0006zA-21 for qemu-devel@nongnu.org; Mon, 03 Jul 2017 22:31:44 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1dSDcq-0003mY-Uh for qemu-devel@nongnu.org; Mon, 03 Jul 2017 22:31:44 -0400 Received: from mx1.redhat.com ([209.132.183.28]:39896) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1dSDcq-0003kH-PN for qemu-devel@nongnu.org; Mon, 03 Jul 2017 22:31:40 -0400 Date: Tue, 4 Jul 2017 10:31:34 +0800 From: Peter Xu Message-ID: <20170704023134.GE32003@pxdev.xzpeter.org> References: <1498715394-16402-1-git-send-email-tianyu.lan@intel.com> <1498715394-16402-2-git-send-email-tianyu.lan@intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline In-Reply-To: <1498715394-16402-2-git-send-email-tianyu.lan@intel.com> Subject: Re: [Qemu-devel] [PATCH 1/3] i386/msi: Correct mask of destination ID in MSI address List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Lan Tianyu Cc: qemu-devel@nongnu.org, xen-devel@lists.xensource.com, kevin.tian@intel.com, sstabellini@kernel.org, mst@redhat.com, anthony.perard@citrix.com, marcel@redhat.com, Chao Gao On Thu, Jun 29, 2017 at 01:49:52AM -0400, Lan Tianyu wrote: > From: Chao Gao > > According to SDM 10.11.1, only [19:12] bits of MSI address are > Destination ID, change the mask to avoid ambiguity for VT-d spec > has used the bit 4 to indicate a remappable interrupt request. > > Signed-off-by: Chao Gao > Signed-off-by: Lan Tianyu Reviewed-by: Peter Xu > --- > include/hw/i386/apic-msidef.h | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/include/hw/i386/apic-msidef.h b/include/hw/i386/apic-msidef.h > index 8b4d4cc..420b411 100644 > --- a/include/hw/i386/apic-msidef.h > +++ b/include/hw/i386/apic-msidef.h > @@ -26,6 +26,6 @@ > > #define MSI_ADDR_DEST_ID_SHIFT 12 > #define MSI_ADDR_DEST_IDX_SHIFT 4 > -#define MSI_ADDR_DEST_ID_MASK 0x00ffff0 > +#define MSI_ADDR_DEST_ID_MASK 0x000ff000 > > #endif /* HW_APIC_MSIDEF_H */ > -- > 1.8.3.1 > > -- Peter Xu From mboxrd@z Thu Jan 1 00:00:00 1970 From: Peter Xu Subject: Re: [Qemu-devel] [PATCH 1/3] i386/msi: Correct mask of destination ID in MSI address Date: Tue, 4 Jul 2017 10:31:34 +0800 Message-ID: <20170704023134.GE32003@pxdev.xzpeter.org> References: <1498715394-16402-1-git-send-email-tianyu.lan@intel.com> <1498715394-16402-2-git-send-email-tianyu.lan@intel.com> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Return-path: Content-Disposition: inline In-Reply-To: <1498715394-16402-2-git-send-email-tianyu.lan@intel.com> List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xen.org Sender: "Xen-devel" To: Lan Tianyu Cc: kevin.tian@intel.com, xen-devel@lists.xensource.com, mst@redhat.com, qemu-devel@nongnu.org, marcel@redhat.com, sstabellini@kernel.org, anthony.perard@citrix.com, Chao Gao List-Id: xen-devel@lists.xenproject.org T24gVGh1LCBKdW4gMjksIDIwMTcgYXQgMDE6NDk6NTJBTSAtMDQwMCwgTGFuIFRpYW55dSB3cm90 ZToKPiBGcm9tOiBDaGFvIEdhbyA8Y2hhby5nYW9AaW50ZWwuY29tPgo+IAo+IEFjY29yZGluZyB0 byBTRE0gMTAuMTEuMSwgb25seSBbMTk6MTJdIGJpdHMgb2YgTVNJIGFkZHJlc3MgYXJlCj4gRGVz dGluYXRpb24gSUQsIGNoYW5nZSB0aGUgbWFzayB0byBhdm9pZCBhbWJpZ3VpdHkgZm9yIFZULWQg c3BlYwo+IGhhcyB1c2VkIHRoZSBiaXQgNCB0byBpbmRpY2F0ZSBhIHJlbWFwcGFibGUgaW50ZXJy dXB0IHJlcXVlc3QuCj4gCj4gU2lnbmVkLW9mZi1ieTogQ2hhbyBHYW8gPGNoYW8uZ2FvQGludGVs LmNvbT4KPiBTaWduZWQtb2ZmLWJ5OiBMYW4gVGlhbnl1IDx0aWFueXUubGFuQGludGVsLmNvbT4K ClJldmlld2VkLWJ5OiBQZXRlciBYdSA8cGV0ZXJ4QHJlZGhhdC5jb20+Cgo+IC0tLQo+ICBpbmNs dWRlL2h3L2kzODYvYXBpYy1tc2lkZWYuaCB8IDIgKy0KPiAgMSBmaWxlIGNoYW5nZWQsIDEgaW5z ZXJ0aW9uKCspLCAxIGRlbGV0aW9uKC0pCj4gCj4gZGlmZiAtLWdpdCBhL2luY2x1ZGUvaHcvaTM4 Ni9hcGljLW1zaWRlZi5oIGIvaW5jbHVkZS9ody9pMzg2L2FwaWMtbXNpZGVmLmgKPiBpbmRleCA4 YjRkNGNjLi40MjBiNDExIDEwMDY0NAo+IC0tLSBhL2luY2x1ZGUvaHcvaTM4Ni9hcGljLW1zaWRl Zi5oCj4gKysrIGIvaW5jbHVkZS9ody9pMzg2L2FwaWMtbXNpZGVmLmgKPiBAQCAtMjYsNiArMjYs NiBAQAo+ICAKPiAgI2RlZmluZSBNU0lfQUREUl9ERVNUX0lEX1NISUZUICAgICAgICAgIDEyCj4g ICNkZWZpbmUgTVNJX0FERFJfREVTVF9JRFhfU0hJRlQgICAgICAgICA0Cj4gLSNkZWZpbmUgIE1T SV9BRERSX0RFU1RfSURfTUFTSyAgICAgICAgICAweDAwZmZmZjAKPiArI2RlZmluZSAgTVNJX0FE RFJfREVTVF9JRF9NQVNLICAgICAgICAgIDB4MDAwZmYwMDAKPiAgCj4gICNlbmRpZiAvKiBIV19B UElDX01TSURFRl9IICovCj4gLS0gCj4gMS44LjMuMQo+IAo+IAoKLS0gClBldGVyIFh1CgpfX19f X19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fXwpYZW4tZGV2ZWwgbWFp bGluZyBsaXN0Clhlbi1kZXZlbEBsaXN0cy54ZW4ub3JnCmh0dHBzOi8vbGlzdHMueGVuLm9yZy94 ZW4tZGV2ZWwK