From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:37628) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dUTFJ-0007pe-2k for qemu-devel@nongnu.org; Mon, 10 Jul 2017 03:36:42 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1dUTFE-0007cR-ET for qemu-devel@nongnu.org; Mon, 10 Jul 2017 03:36:41 -0400 Received: from mail-pg0-x242.google.com ([2607:f8b0:400e:c05::242]:35057) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1dUTFE-0007cL-8C for qemu-devel@nongnu.org; Mon, 10 Jul 2017 03:36:36 -0400 Received: by mail-pg0-x242.google.com with SMTP id d193so11723613pgc.2 for ; Mon, 10 Jul 2017 00:36:36 -0700 (PDT) Sender: Richard Henderson From: Richard Henderson Date: Sun, 9 Jul 2017 21:35:00 -1000 Message-Id: <20170710073501.5207-5-rth@twiddle.net> In-Reply-To: <20170710073501.5207-1-rth@twiddle.net> References: <20170710073501.5207-1-rth@twiddle.net> Subject: [Qemu-devel] [PULL 4/5] util/cacheinfo: Fix warning generated by clang List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: peter.maydell@linaro.org, Pranith Kumar From: Pranith Kumar Clang generates the following warning on aarch64 host: CC util/cacheinfo.o /home/pranith/qemu/util/cacheinfo.c:121:48: warning: value size does not match register size specified by the constraint and modifier [-Wasm-operand-widths] asm volatile("mrs\t%0, ctr_el0" : "=r"(ctr)); ^ /home/pranith/qemu/util/cacheinfo.c:121:28: note: use constraint modifier "w" asm volatile("mrs\t%0, ctr_el0" : "=r"(ctr)); ^~ %w0 Constraint modifier 'w' is not (yet?) accepted by gcc. Fix this by increasing the ctr size. Tested-by: Emilio G. Cota Reviewed-by: Emilio G. Cota Signed-off-by: Pranith Kumar Message-Id: <20170630153946.11997-1-bobby.prani@gmail.com> Signed-off-by: Richard Henderson --- util/cacheinfo.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/util/cacheinfo.c b/util/cacheinfo.c index f987522..6253049 100644 --- a/util/cacheinfo.c +++ b/util/cacheinfo.c @@ -112,7 +112,7 @@ static void sys_cache_info(int *isize, int *dsize) static void arch_cache_info(int *isize, int *dsize) { if (*isize == 0 || *dsize == 0) { - unsigned ctr; + unsigned long ctr; /* The real cache geometry is in CCSIDR_EL1/CLIDR_EL1/CSSELR_EL1, but (at least under Linux) these are marked protected by the -- 2.9.4