From: Matt Fleming <matt@codeblueprint.co.uk>
To: Andy Lutomirski <luto@kernel.org>
Cc: x86@kernel.org, linux-kernel@vger.kernel.org,
Borislav Petkov <bp@alien8.de>,
Linus Torvalds <torvalds@linux-foundation.org>,
Andrew Morton <akpm@linux-foundation.org>,
Mel Gorman <mgorman@suse.de>,
"linux-mm@kvack.org" <linux-mm@kvack.org>,
Nadav Amit <nadav.amit@gmail.com>, Rik van Riel <riel@redhat.com>,
Dave Hansen <dave.hansen@intel.com>,
Arjan van de Ven <arjan@linux.intel.com>,
Peter Zijlstra <peterz@infradead.org>
Subject: Re: [PATCH v4 00/10] PCID and improved laziness
Date: Tue, 11 Jul 2017 12:32:33 +0100 [thread overview]
Message-ID: <20170711113233.GA19177@codeblueprint.co.uk> (raw)
In-Reply-To: <20170630124422.GA12077@codeblueprint.co.uk>
On Fri, 30 Jun, at 01:44:22PM, Matt Fleming wrote:
> On Thu, 29 Jun, at 08:53:12AM, Andy Lutomirski wrote:
> > *** Ingo, even if this misses 4.13, please apply the first patch before
> > *** the merge window.
> >
> > There are three performance benefits here:
> >
> > 1. TLB flushing is slow. (I.e. the flush itself takes a while.)
> > This avoids many of them when switching tasks by using PCID. In
> > a stupid little benchmark I did, it saves about 100ns on my laptop
> > per context switch. I'll try to improve that benchmark.
> >
> > 2. Mms that have been used recently on a given CPU might get to keep
> > their TLB entries alive across process switches with this patch
> > set. TLB fills are pretty fast on modern CPUs, but they're even
> > faster when they don't happen.
> >
> > 3. Lazy TLB is way better. We used to do two stupid things when we
> > ran kernel threads: we'd send IPIs to flush user contexts on their
> > CPUs and then we'd write to CR3 for no particular reason as an excuse
> > to stop further IPIs. With this patch, we do neither.
>
> Heads up, I'm gonna queue this for a run on SUSE's performance test
> grid.
FWIW, I didn't see any change in performance with this series on a
PCID-capable machine. On the plus side, I didn't see any weird-looking
bugs either.
Are your benchmarks available anywhere?
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WARNING: multiple messages have this Message-ID (diff)
From: Matt Fleming <matt@codeblueprint.co.uk>
To: Andy Lutomirski <luto@kernel.org>
Cc: x86@kernel.org, linux-kernel@vger.kernel.org,
Borislav Petkov <bp@alien8.de>,
Linus Torvalds <torvalds@linux-foundation.org>,
Andrew Morton <akpm@linux-foundation.org>,
Mel Gorman <mgorman@suse.de>,
"linux-mm@kvack.org" <linux-mm@kvack.org>,
Nadav Amit <nadav.amit@gmail.com>, Rik van Riel <riel@redhat.com>,
Dave Hansen <dave.hansen@intel.com>,
Arjan van de Ven <arjan@linux.intel.com>,
Peter Zijlstra <peterz@infradead.org>
Subject: Re: [PATCH v4 00/10] PCID and improved laziness
Date: Tue, 11 Jul 2017 12:32:33 +0100 [thread overview]
Message-ID: <20170711113233.GA19177@codeblueprint.co.uk> (raw)
In-Reply-To: <20170630124422.GA12077@codeblueprint.co.uk>
On Fri, 30 Jun, at 01:44:22PM, Matt Fleming wrote:
> On Thu, 29 Jun, at 08:53:12AM, Andy Lutomirski wrote:
> > *** Ingo, even if this misses 4.13, please apply the first patch before
> > *** the merge window.
> >
> > There are three performance benefits here:
> >
> > 1. TLB flushing is slow. (I.e. the flush itself takes a while.)
> > This avoids many of them when switching tasks by using PCID. In
> > a stupid little benchmark I did, it saves about 100ns on my laptop
> > per context switch. I'll try to improve that benchmark.
> >
> > 2. Mms that have been used recently on a given CPU might get to keep
> > their TLB entries alive across process switches with this patch
> > set. TLB fills are pretty fast on modern CPUs, but they're even
> > faster when they don't happen.
> >
> > 3. Lazy TLB is way better. We used to do two stupid things when we
> > ran kernel threads: we'd send IPIs to flush user contexts on their
> > CPUs and then we'd write to CR3 for no particular reason as an excuse
> > to stop further IPIs. With this patch, we do neither.
>
> Heads up, I'm gonna queue this for a run on SUSE's performance test
> grid.
FWIW, I didn't see any change in performance with this series on a
PCID-capable machine. On the plus side, I didn't see any weird-looking
bugs either.
Are your benchmarks available anywhere?
next prev parent reply other threads:[~2017-07-11 11:32 UTC|newest]
Thread overview: 78+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-06-29 15:53 [PATCH v4 00/10] PCID and improved laziness Andy Lutomirski
2017-06-29 15:53 ` Andy Lutomirski
2017-06-29 15:53 ` [PATCH v4 01/10] x86/mm: Don't reenter flush_tlb_func_common() Andy Lutomirski
2017-06-29 15:53 ` Andy Lutomirski
2017-06-30 13:11 ` [tip:x86/mm] " tip-bot for Andy Lutomirski
2017-06-29 15:53 ` [PATCH v4 02/10] x86/mm: Delete a big outdated comment about TLB flushing Andy Lutomirski
2017-06-29 15:53 ` Andy Lutomirski
2017-06-30 13:11 ` [tip:x86/mm] " tip-bot for Andy Lutomirski
2017-06-29 15:53 ` [PATCH v4 03/10] x86/mm: Give each mm TLB flush generation a unique ID Andy Lutomirski
2017-06-29 15:53 ` Andy Lutomirski
2017-07-05 10:31 ` [tip:x86/mm] " tip-bot for Andy Lutomirski
2017-07-05 10:58 ` Peter Zijlstra
2017-06-29 15:53 ` [PATCH v4 04/10] x86/mm: Track the TLB's tlb_gen and update the flushing algorithm Andy Lutomirski
2017-06-29 15:53 ` Andy Lutomirski
2017-07-05 10:31 ` [tip:x86/mm] " tip-bot for Andy Lutomirski
2017-06-29 15:53 ` [PATCH v4 05/10] x86/mm: Rework lazy TLB mode and TLB freshness tracking Andy Lutomirski
2017-06-29 15:53 ` Andy Lutomirski
2017-07-05 10:31 ` [tip:x86/mm] " tip-bot for Andy Lutomirski
2017-06-29 15:53 ` [PATCH v4 06/10] x86/mm: Stop calling leave_mm() in idle code Andy Lutomirski
2017-06-29 15:53 ` Andy Lutomirski
2017-07-05 10:32 ` [tip:x86/mm] " tip-bot for Andy Lutomirski
2017-06-29 15:53 ` [PATCH v4 07/10] x86/mm: Disable PCID on 32-bit kernels Andy Lutomirski
2017-06-29 15:53 ` Andy Lutomirski
2017-07-05 10:32 ` [tip:x86/mm] " tip-bot for Andy Lutomirski
2017-06-29 15:53 ` [PATCH v4 08/10] x86/mm: Add nopcid to turn off PCID Andy Lutomirski
2017-06-29 15:53 ` Andy Lutomirski
2017-07-05 10:32 ` [tip:x86/mm] x86/mm: Add the 'nopcid' boot option " tip-bot for Andy Lutomirski
2017-06-29 15:53 ` [PATCH v4 09/10] x86/mm: Enable CR4.PCIDE on supported systems Andy Lutomirski
2017-06-29 15:53 ` Andy Lutomirski
2017-07-05 10:33 ` [tip:x86/mm] " tip-bot for Andy Lutomirski
2017-06-29 15:53 ` [PATCH v4 10/10] x86/mm: Try to preserve old TLB entries using PCID Andy Lutomirski
2017-06-29 15:53 ` Andy Lutomirski
2017-07-03 10:56 ` Thomas Gleixner
2017-07-03 10:56 ` Thomas Gleixner
2017-07-05 12:18 ` Peter Zijlstra
2017-07-05 12:18 ` Peter Zijlstra
2017-07-05 16:04 ` Andy Lutomirski
2017-07-05 16:04 ` Andy Lutomirski
2017-07-05 17:02 ` Peter Zijlstra
2017-07-05 17:02 ` Peter Zijlstra
2017-07-18 8:53 ` Ingo Molnar
2017-07-18 8:53 ` Ingo Molnar
2017-07-18 17:06 ` Andy Lutomirski
2017-07-18 17:06 ` Andy Lutomirski
2017-07-05 12:25 ` Peter Zijlstra
2017-07-05 12:25 ` Peter Zijlstra
2017-07-05 16:10 ` Andy Lutomirski
2017-07-05 16:10 ` Andy Lutomirski
2017-07-28 13:49 ` Peter Zijlstra
2017-07-28 13:49 ` Peter Zijlstra
2017-06-30 12:44 ` [PATCH v4 00/10] PCID and improved laziness Matt Fleming
2017-06-30 12:44 ` Matt Fleming
2017-07-11 11:32 ` Matt Fleming [this message]
2017-07-11 11:32 ` Matt Fleming
2017-07-11 15:00 ` Andy Lutomirski
2017-07-11 15:00 ` Andy Lutomirski
2017-07-13 19:36 ` Matt Fleming
2017-07-13 19:36 ` Matt Fleming
2017-07-05 8:56 ` Ingo Molnar
2017-07-05 8:56 ` Ingo Molnar
2017-07-05 16:53 ` Linus Torvalds
2017-07-05 16:53 ` Linus Torvalds
2017-07-17 9:57 ` Mel Gorman
2017-07-17 9:57 ` Mel Gorman
2017-07-17 15:06 ` Ingo Molnar
2017-07-17 15:06 ` Ingo Molnar
2017-07-17 15:56 ` Mel Gorman
2017-07-17 15:56 ` Mel Gorman
[not found] ` <CALBSrqDW6pGjHxOmzfnkY_KoNeH6F=pTb8-tJ8r-zbu4prw9HQ@mail.gmail.com>
2017-09-12 19:32 ` Sai Praneeth Prakhya
2017-09-12 19:32 ` Sai Praneeth Prakhya
2017-09-12 19:45 ` Andy Lutomirski
2017-09-12 20:28 ` Prakhya, Sai Praneeth
2017-09-13 7:43 ` Ingo Molnar
2017-09-13 7:43 ` Ingo Molnar
2017-09-13 7:45 ` Ingo Molnar
2017-09-13 7:45 ` Ingo Molnar
2017-09-13 4:14 ` Sai Praneeth Prakhya
2017-09-13 4:14 ` Sai Praneeth Prakhya
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