From: andrew@lunn.ch (Andrew Lunn)
To: linux-arm-kernel@lists.infradead.org
Subject: i.MX 6 and PCIe DMA issues
Date: Tue, 11 Jul 2017 16:07:22 +0200 [thread overview]
Message-ID: <20170711140722.GI21118@lunn.ch> (raw)
In-Reply-To: <04e1d18a504a477b84f5a9ec661dc9ae@MEN-EX01.intra.men.de>
> I was suspecting the caches to be the root of my issue, but I was
> not able to resolve the issue with calls to flush_cache_all(), which
> I suppose should have invalidated the entire cache.
Flush and invalidate are different operations. flush_cache_all() will
not invalidate.
How are your RX buffers aligned. It is good to ensure that your
buffers don't share cache lines. What could be happening is that you
are reading the tail end of one buffer which is bringing into cache
the head of the next buffer, if they share cache lines.
Also, ARMv7 processors can do speculative reads, so you must get your
dma_sync_single_for_cpu() and dma_sync_single_for_device() correct.
Andrew
next prev parent reply other threads:[~2017-07-11 14:07 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-07-11 13:40 i.MX 6 and PCIe DMA issues Moese, Michael
2017-07-11 14:07 ` Andrew Lunn [this message]
2017-07-11 14:50 ` Robin Murphy
2017-07-13 7:07 ` michael.moese at men.de
2017-07-13 9:04 ` Russell King - ARM Linux
2017-07-13 10:00 ` michael.moese at men.de
2017-07-13 10:18 ` Russell King - ARM Linux
2017-07-13 14:57 ` Robin Murphy
2017-07-14 11:07 ` michael.moese at men.de
2017-07-11 17:56 ` Andrew Lunn
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