[PATCH v2 04/18] drm/i915/gen2: Add an ID for the display pipes power well

[Imre Deak <imre.deak@intel.com>]

Make the I830 power well ID assignment explicit for consistency.

v2:
- s/GEN2/I830/ in the comment, since other GEN2s don't have the power
  well. (Ville)

Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com> (v1)
---
 drivers/gpu/drm/i915/i915_reg.h         | 6 ++++++
 drivers/gpu/drm/i915/intel_runtime_pm.c | 1 +
 2 files changed, 7 insertions(+)

diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 910fd414f18a..f9b232e22050 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -1073,6 +1073,12 @@ static inline bool i915_mmio_reg_valid(i915_reg_t reg)
  */
 enum i915_power_well_id {
 	/*
+	 * I830
+	 *  - custom power well
+	 */
+	I830_DISP_PW_PIPES = 0,
+
+	/*
 	 * VLV/CHV
 	 *  - PUNIT_REG_PWRGT_CTRL (bit: id*2),
 	 *    PUNIT_REG_PWRGT_STATUS (bit: id*2) (PUNIT HAS v0.8)
diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c b/drivers/gpu/drm/i915/intel_runtime_pm.c
index 9601b623188c..4a9d95505f1b 100644
--- a/drivers/gpu/drm/i915/intel_runtime_pm.c
+++ b/drivers/gpu/drm/i915/intel_runtime_pm.c
@@ -2036,6 +2036,7 @@ static struct i915_power_well i830_power_wells[] = {
 		.name = "pipes",
 		.domains = I830_PIPES_POWER_DOMAINS,
 		.ops = &i830_pipes_power_well_ops,
+		.id = I830_DISP_PW_PIPES,
 	},
 };
 
-- 
2.11.0

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