diff for duplicates of <20170712230536.GE22780@codeaurora.org> diff --git a/a/1.txt b/N1/1.txt index 7604c9b..ff8b984 100644 --- a/a/1.txt +++ b/N1/1.txt @@ -1,5 +1,5 @@ On 07/12, Eugeniy Paltsev wrote: -> On Tue, 2017-07-11 at 22:25 -0700, Stephen Boyd wrote: +> On Tue, 2017-07-11@22:25 -0700, Stephen Boyd wrote: > > On 06/21, Eugeniy Paltsev wrote: > > > AXS10X boards manages it's clocks using various PLLs. These PLL has > > > same @@ -16,8 +16,8 @@ On 07/12, Eugeniy Paltsev wrote: > > > > > > As of today we add support for PLLs that generate clock for the > > > following devices: -> > > * ARC core on AXC CPU tiles. -> > > * ARC PGU on ARC SDP Mainboard. +> > > ?* ARC core on AXC CPU tiles. +> > > ?* ARC PGU on ARC SDP Mainboard. > > > and more to come later. > > > > > > By this patch we add support for two plls (arc core pll and pgu @@ -26,12 +26,12 @@ On 07/12, Eugeniy Paltsev wrote: > > > core pll and > > > regular probing for pgu pll. > > > -> > > Acked-by: Rob Herring <robh@kernel.org> -> > > Acked-by: Jose Abreu <joabreu@synopsys.com> +> > > Acked-by: Rob Herring <robh at kernel.org> +> > > Acked-by: Jose Abreu <joabreu at synopsys.com> > > > -> > > Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> -> > > Signed-off-by: Vlad Zakharov <vzakhar@synopsys.com> -> > > Signed-off-by: Jose Abreu <joabreu@synopsys.com> +> > > Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev at synopsys.com> +> > > Signed-off-by: Vlad Zakharov <vzakhar at synopsys.com> +> > > Signed-off-by: Jose Abreu <joabreu at synopsys.com> > > > > Sorry this missed the cutoff for new code for v4.13. Should be in > > clk-next next week though. diff --git a/a/content_digest b/N1/content_digest index 1d00ad4..5bd66da 100644 --- a/a/content_digest +++ b/N1/content_digest @@ -1,19 +1,14 @@ "ref\020170621191626.32248-1-Eugeniy.Paltsev@synopsys.com\0" "ref\020170712052535.GY22780@codeaurora.org\0" "ref\01499846503.9320.1.camel@synopsys.com\0" - "From\0sboyd@codeaurora.org <sboyd@codeaurora.org>\0" - "Subject\0Re: [PATCH v4] clk: axs10x: introduce AXS10X pll driver\0" + "From\0sboyd@codeaurora.org (sboyd@codeaurora.org)\0" + "Subject\0[PATCH v4] clk: axs10x: introduce AXS10X pll driver\0" "Date\0Wed, 12 Jul 2017 16:05:36 -0700\0" - "To\0Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>\0" - "Cc\0linux-kernel@vger.kernel.org <linux-kernel@vger.kernel.org>" - Jose.Abreu@synopsys.com <Jose.Abreu@synopsys.com> - mturquette@baylibre.com <mturquette@baylibre.com> - linux-clk@vger.kernel.org <linux-clk@vger.kernel.org> - " linux-snps-arc@lists.infradead.org <linux-snps-arc@lists.infradead.org>\0" + "To\0linux-snps-arc@lists.infradead.org\0" "\00:1\0" "b\0" "On 07/12, Eugeniy Paltsev wrote:\n" - "> On Tue, 2017-07-11 at 22:25 -0700, Stephen Boyd wrote:\n" + "> On Tue, 2017-07-11@22:25 -0700, Stephen Boyd wrote:\n" "> > On 06/21, Eugeniy Paltsev wrote:\n" "> > > AXS10X boards manages it's clocks using various PLLs. These PLL has\n" "> > > same\n" @@ -30,8 +25,8 @@ "> > > \n" "> > > As of today we add support for PLLs that generate clock for the\n" "> > > following devices:\n" - "> > > \302\240* ARC core on AXC CPU tiles.\n" - "> > > \302\240* ARC PGU on ARC SDP Mainboard.\n" + "> > > ?* ARC core on AXC CPU tiles.\n" + "> > > ?* ARC PGU on ARC SDP Mainboard.\n" "> > > and more to come later.\n" "> > > \n" "> > > By this patch we add support for two plls (arc core pll and pgu\n" @@ -40,12 +35,12 @@ "> > > core pll and\n" "> > > regular probing for pgu pll.\n" "> > > \n" - "> > > Acked-by: Rob Herring <robh@kernel.org>\n" - "> > > Acked-by: Jose Abreu <joabreu@synopsys.com>\n" + "> > > Acked-by: Rob Herring <robh at kernel.org>\n" + "> > > Acked-by: Jose Abreu <joabreu at synopsys.com>\n" "> > > \n" - "> > > Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>\n" - "> > > Signed-off-by: Vlad Zakharov <vzakhar@synopsys.com>\n" - "> > > Signed-off-by: Jose Abreu <joabreu@synopsys.com>\n" + "> > > Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev at synopsys.com>\n" + "> > > Signed-off-by: Vlad Zakharov <vzakhar at synopsys.com>\n" + "> > > Signed-off-by: Jose Abreu <joabreu at synopsys.com>\n" "> > \n" "> > Sorry this missed the cutoff for new code for v4.13. Should be in\n" "> > clk-next next week though.\n" @@ -94,4 +89,4 @@ "Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,\n" a Linux Foundation Collaborative Project -39ee274b0cca8cd0eadffadc2a0939ff7ef962694a86f90f3e3a441400ccf534 +36201385303f737b97a07f4cbcf1ee4208303f9c89c1c205bc50e351aa53952c
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