diff for duplicates of <20170719115333.GJ13642@arm.com> diff --git a/a/1.txt b/N1/1.txt index b2ff6bf..6daca9d 100644 --- a/a/1.txt +++ b/N1/1.txt @@ -1,15 +1,15 @@ On Wed, Jul 19, 2017 at 05:09:05PM +0530, Anup Patel wrote: -> On Wed, Jul 19, 2017 at 5:03 PM, Will Deacon <will.deacon-5wv7dgnIgG8@public.gmane.org> wrote: +> On Wed, Jul 19, 2017 at 5:03 PM, Will Deacon <will.deacon@arm.com> wrote: > > On Wed, Jul 19, 2017 at 05:01:11PM +0530, Anup Patel wrote: -> >> On Wed, Jul 19, 2017 at 4:55 PM, Will Deacon <will.deacon-5wv7dgnIgG8@public.gmane.org> wrote: +> >> On Wed, Jul 19, 2017 at 4:55 PM, Will Deacon <will.deacon@arm.com> wrote: > >> > On Wed, Jul 19, 2017 at 04:53:04PM +0530, Anup Patel wrote: -> >> >> On Wed, Jul 19, 2017 at 4:30 PM, Robin Murphy <robin.murphy-5wv7dgnIgG8@public.gmane.org> wrote: +> >> >> On Wed, Jul 19, 2017 at 4:30 PM, Robin Murphy <robin.murphy@arm.com> wrote: > >> >> > On 19/07/17 10:33, Anup Patel wrote: > >> >> >> The ARM SMMUv3 support bypassing transactions for which domain > >> >> >> is not configured. The patch adds corresponding IOMMU capability > >> >> >> to advertise this fact. > >> >> >> -> >> >> >> Signed-off-by: Anup Patel <anup.patel-dY08KVG/lbpWk0Htik3J/w@public.gmane.org> +> >> >> >> Signed-off-by: Anup Patel <anup.patel@broadcom.com> > >> >> >> --- > >> >> >> drivers/iommu/arm-smmu-v3.c | 2 ++ > >> >> >> 1 file changed, 2 insertions(+) diff --git a/a/content_digest b/N1/content_digest index cf688cd..81efbb1 100644 --- a/a/content_digest +++ b/N1/content_digest @@ -6,31 +6,24 @@ "ref\0CAALAos_xGCt7U1Oz5uCf9Q4hP6fdn4fcymFNQP5xO_UBduSY3g@mail.gmail.com\0" "ref\020170719113325.GI13642@arm.com\0" "ref\0CAALAos99HWLoW=0P-dvFA+oNsF03TRNzNbfppyQNtqmcRELXXQ@mail.gmail.com\0" - "ref\0CAALAos99HWLoW=0P-dvFA+oNsF03TRNzNbfppyQNtqmcRELXXQ-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org\0" - "From\0Will Deacon <will.deacon-5wv7dgnIgG8@public.gmane.org>\0" - "Subject\0Re: [PATCH 3/5] iommu/arm-smmu-v3: add IOMMU_CAP_BYPASS to the ARM SMMUv3 driver\0" + "From\0will.deacon@arm.com (Will Deacon)\0" + "Subject\0[PATCH 3/5] iommu/arm-smmu-v3: add IOMMU_CAP_BYPASS to the ARM SMMUv3 driver\0" "Date\0Wed, 19 Jul 2017 12:53:33 +0100\0" - "To\0Anup Patel <anup.patel-dY08KVG/lbpWk0Htik3J/w@public.gmane.org>\0" - "Cc\0kvm-u79uwXL29TY76Z2rM5mHXA@public.gmane.org" - Scott Branden <sbranden-dY08KVG/lbpWk0Htik3J/w@public.gmane.org> - Linux Kernel <linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org> - Linux IOMMU <iommu-cunTk1MwBs9QetFLy7KEm3xJsTq8ys+cHZ5vskTnxNA@public.gmane.org> - BCM Kernel Feedback <bcm-kernel-feedback-list-dY08KVG/lbpWk0Htik3J/w@public.gmane.org> - " Linux ARM Kernel <linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org>\0" + "To\0linux-arm-kernel@lists.infradead.org\0" "\00:1\0" "b\0" "On Wed, Jul 19, 2017 at 05:09:05PM +0530, Anup Patel wrote:\n" - "> On Wed, Jul 19, 2017 at 5:03 PM, Will Deacon <will.deacon-5wv7dgnIgG8@public.gmane.org> wrote:\n" + "> On Wed, Jul 19, 2017 at 5:03 PM, Will Deacon <will.deacon@arm.com> wrote:\n" "> > On Wed, Jul 19, 2017 at 05:01:11PM +0530, Anup Patel wrote:\n" - "> >> On Wed, Jul 19, 2017 at 4:55 PM, Will Deacon <will.deacon-5wv7dgnIgG8@public.gmane.org> wrote:\n" + "> >> On Wed, Jul 19, 2017 at 4:55 PM, Will Deacon <will.deacon@arm.com> wrote:\n" "> >> > On Wed, Jul 19, 2017 at 04:53:04PM +0530, Anup Patel wrote:\n" - "> >> >> On Wed, Jul 19, 2017 at 4:30 PM, Robin Murphy <robin.murphy-5wv7dgnIgG8@public.gmane.org> wrote:\n" + "> >> >> On Wed, Jul 19, 2017 at 4:30 PM, Robin Murphy <robin.murphy@arm.com> wrote:\n" "> >> >> > On 19/07/17 10:33, Anup Patel wrote:\n" "> >> >> >> The ARM SMMUv3 support bypassing transactions for which domain\n" "> >> >> >> is not configured. The patch adds corresponding IOMMU capability\n" "> >> >> >> to advertise this fact.\n" "> >> >> >>\n" - "> >> >> >> Signed-off-by: Anup Patel <anup.patel-dY08KVG/lbpWk0Htik3J/w@public.gmane.org>\n" + "> >> >> >> Signed-off-by: Anup Patel <anup.patel@broadcom.com>\n" "> >> >> >> ---\n" "> >> >> >> drivers/iommu/arm-smmu-v3.c | 2 ++\n" "> >> >> >> 1 file changed, 2 insertions(+)\n" @@ -99,4 +92,4 @@ "\n" Will -81937cb339f89e078c5528d25d0a7f3f4f6f55da79b3cb4072982540dfd6bd68 +4432ec049ac3e4616b2fba7559009695b060f224c955fc9576f588b08180384a
diff --git a/a/1.txt b/N2/1.txt index b2ff6bf..6daca9d 100644 --- a/a/1.txt +++ b/N2/1.txt @@ -1,15 +1,15 @@ On Wed, Jul 19, 2017 at 05:09:05PM +0530, Anup Patel wrote: -> On Wed, Jul 19, 2017 at 5:03 PM, Will Deacon <will.deacon-5wv7dgnIgG8@public.gmane.org> wrote: +> On Wed, Jul 19, 2017 at 5:03 PM, Will Deacon <will.deacon@arm.com> wrote: > > On Wed, Jul 19, 2017 at 05:01:11PM +0530, Anup Patel wrote: -> >> On Wed, Jul 19, 2017 at 4:55 PM, Will Deacon <will.deacon-5wv7dgnIgG8@public.gmane.org> wrote: +> >> On Wed, Jul 19, 2017 at 4:55 PM, Will Deacon <will.deacon@arm.com> wrote: > >> > On Wed, Jul 19, 2017 at 04:53:04PM +0530, Anup Patel wrote: -> >> >> On Wed, Jul 19, 2017 at 4:30 PM, Robin Murphy <robin.murphy-5wv7dgnIgG8@public.gmane.org> wrote: +> >> >> On Wed, Jul 19, 2017 at 4:30 PM, Robin Murphy <robin.murphy@arm.com> wrote: > >> >> > On 19/07/17 10:33, Anup Patel wrote: > >> >> >> The ARM SMMUv3 support bypassing transactions for which domain > >> >> >> is not configured. The patch adds corresponding IOMMU capability > >> >> >> to advertise this fact. > >> >> >> -> >> >> >> Signed-off-by: Anup Patel <anup.patel-dY08KVG/lbpWk0Htik3J/w@public.gmane.org> +> >> >> >> Signed-off-by: Anup Patel <anup.patel@broadcom.com> > >> >> >> --- > >> >> >> drivers/iommu/arm-smmu-v3.c | 2 ++ > >> >> >> 1 file changed, 2 insertions(+) diff --git a/a/content_digest b/N2/content_digest index cf688cd..566e53c 100644 --- a/a/content_digest +++ b/N2/content_digest @@ -6,31 +6,34 @@ "ref\0CAALAos_xGCt7U1Oz5uCf9Q4hP6fdn4fcymFNQP5xO_UBduSY3g@mail.gmail.com\0" "ref\020170719113325.GI13642@arm.com\0" "ref\0CAALAos99HWLoW=0P-dvFA+oNsF03TRNzNbfppyQNtqmcRELXXQ@mail.gmail.com\0" - "ref\0CAALAos99HWLoW=0P-dvFA+oNsF03TRNzNbfppyQNtqmcRELXXQ-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org\0" - "From\0Will Deacon <will.deacon-5wv7dgnIgG8@public.gmane.org>\0" + "From\0Will Deacon <will.deacon@arm.com>\0" "Subject\0Re: [PATCH 3/5] iommu/arm-smmu-v3: add IOMMU_CAP_BYPASS to the ARM SMMUv3 driver\0" "Date\0Wed, 19 Jul 2017 12:53:33 +0100\0" - "To\0Anup Patel <anup.patel-dY08KVG/lbpWk0Htik3J/w@public.gmane.org>\0" - "Cc\0kvm-u79uwXL29TY76Z2rM5mHXA@public.gmane.org" - Scott Branden <sbranden-dY08KVG/lbpWk0Htik3J/w@public.gmane.org> - Linux Kernel <linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org> - Linux IOMMU <iommu-cunTk1MwBs9QetFLy7KEm3xJsTq8ys+cHZ5vskTnxNA@public.gmane.org> - BCM Kernel Feedback <bcm-kernel-feedback-list-dY08KVG/lbpWk0Htik3J/w@public.gmane.org> - " Linux ARM Kernel <linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org>\0" + "To\0Anup Patel <anup.patel@broadcom.com>\0" + "Cc\0Robin Murphy <robin.murphy@arm.com>" + Joerg Roedel <joro@8bytes.org> + Baptiste Reynal <b.reynal@virtualopensystems.com> + Alex Williamson <alex.williamson@redhat.com> + Scott Branden <sbranden@broadcom.com> + Linux Kernel <linux-kernel@vger.kernel.org> + Linux ARM Kernel <linux-arm-kernel@lists.infradead.org> + Linux IOMMU <iommu@lists.linux-foundation.org> + kvm@vger.kernel.org + " BCM Kernel Feedback <bcm-kernel-feedback-list@broadcom.com>\0" "\00:1\0" "b\0" "On Wed, Jul 19, 2017 at 05:09:05PM +0530, Anup Patel wrote:\n" - "> On Wed, Jul 19, 2017 at 5:03 PM, Will Deacon <will.deacon-5wv7dgnIgG8@public.gmane.org> wrote:\n" + "> On Wed, Jul 19, 2017 at 5:03 PM, Will Deacon <will.deacon@arm.com> wrote:\n" "> > On Wed, Jul 19, 2017 at 05:01:11PM +0530, Anup Patel wrote:\n" - "> >> On Wed, Jul 19, 2017 at 4:55 PM, Will Deacon <will.deacon-5wv7dgnIgG8@public.gmane.org> wrote:\n" + "> >> On Wed, Jul 19, 2017 at 4:55 PM, Will Deacon <will.deacon@arm.com> wrote:\n" "> >> > On Wed, Jul 19, 2017 at 04:53:04PM +0530, Anup Patel wrote:\n" - "> >> >> On Wed, Jul 19, 2017 at 4:30 PM, Robin Murphy <robin.murphy-5wv7dgnIgG8@public.gmane.org> wrote:\n" + "> >> >> On Wed, Jul 19, 2017 at 4:30 PM, Robin Murphy <robin.murphy@arm.com> wrote:\n" "> >> >> > On 19/07/17 10:33, Anup Patel wrote:\n" "> >> >> >> The ARM SMMUv3 support bypassing transactions for which domain\n" "> >> >> >> is not configured. The patch adds corresponding IOMMU capability\n" "> >> >> >> to advertise this fact.\n" "> >> >> >>\n" - "> >> >> >> Signed-off-by: Anup Patel <anup.patel-dY08KVG/lbpWk0Htik3J/w@public.gmane.org>\n" + "> >> >> >> Signed-off-by: Anup Patel <anup.patel@broadcom.com>\n" "> >> >> >> ---\n" "> >> >> >> drivers/iommu/arm-smmu-v3.c | 2 ++\n" "> >> >> >> 1 file changed, 2 insertions(+)\n" @@ -99,4 +102,4 @@ "\n" Will -81937cb339f89e078c5528d25d0a7f3f4f6f55da79b3cb4072982540dfd6bd68 +0a72413102406e55cae765949cc6184c2236d5adf214c801f43c668d76ba2726
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