From mboxrd@z Thu Jan 1 00:00:00 1970 From: "Luck, Tony" Subject: Re: [PATCH 3/3] ghes_edac: add platform check to enable ghes_edac Date: Thu, 20 Jul 2017 14:15:54 -0700 Message-ID: <20170720211553.itdbvjacjnliago5@intel.com> References: <20170717215912.26070-1-toshi.kani@hpe.com> <20170717215912.26070-4-toshi.kani@hpe.com> <20170718060007.GB8736@nazgul.tnic> <1500407379.2042.21.camel@hpe.com> <20170718181545.32bd9181@vento.lan> <20170719055838.GF26030@nazgul.tnic> <3908561D78D1C84285E8C5FCA982C28F6130D126@ORSMSX114.amr.corp.intel.com> <20170719130245.7fc97352@vento.lan> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Return-path: Received: from mga09.intel.com ([134.134.136.24]:40344 "EHLO mga09.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S933285AbdGTVQD (ORCPT ); Thu, 20 Jul 2017 17:16:03 -0400 Content-Disposition: inline In-Reply-To: <20170719130245.7fc97352@vento.lan> Sender: linux-acpi-owner@vger.kernel.org List-Id: linux-acpi@vger.kernel.org To: Mauro Carvalho Chehab Cc: Aristeu Rozanski , "rjw@rjwysocki.net" , "srinivas.pandruvada@linux.intel.com" , "lenb@kernel.org" , "linux-acpi@vger.kernel.org" , "linux-edac@vger.kernel.org" On Wed, Jul 19, 2017 at 01:02:45PM -0300, Mauro Carvalho Chehab wrote: > Tony/Aris, > > I got yesterday an HP ML350 G9, equipped with Sandy Bridge EP CPUs (E5-2640v4). > I'm running Kernel 4.11 there. > > AFAIKT, Sandy Bridge EP has 4 channels per memory controller, right? > That would match the number of memory slots on this machine (24 slots). > > Yet, EDAC is only identifying 3 channels per CPU: > > $ ras-mc-ctl --layout > +-----------------------------------------------------------------------+ > | mc0 | mc1 | > | channel0 | channel1 | channel2 | channel0 | channel1 | channel2 | > -------+-----------------------------------------------------------------------+ > slot2: | 0 MB | 0 MB | 0 MB | 0 MB | 0 MB | 0 MB | > slot1: | 0 MB | 0 MB | 0 MB | 0 MB | 0 MB | 0 MB | > slot0: | 16384 MB | 0 MB | 16384 MB | 16384 MB | 0 MB | 16384 MB | > -------+---------------------------------------------------------------------------+ > > So, it seems that either the BIOS is hidden the other channel or > there's something wrong with SandyBridge EP support at sb_edac driver. Does lspci show all four of these devices? include/linux/pci_ids.h:#define PCI_DEVICE_ID_INTEL_SBRIDGE_IMC_TAD0 0x3caa /* 15.2 */ include/linux/pci_ids.h:#define PCI_DEVICE_ID_INTEL_SBRIDGE_IMC_TAD1 0x3cab /* 15.3 */ include/linux/pci_ids.h:#define PCI_DEVICE_ID_INTEL_SBRIDGE_IMC_TAD2 0x3cac /* 15.4 */ include/linux/pci_ids.h:#define PCI_DEVICE_ID_INTEL_SBRIDGE_IMC_TAD3 0x3cad /* 15.5 */ There should be two of each (one on bus 7f, the other on bus ff). -Tony From mboxrd@z Thu Jan 1 00:00:00 1970 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: base64 Subject: [3/3] ghes_edac: add platform check to enable ghes_edac From: "Luck, Tony" Message-Id: <20170720211553.itdbvjacjnliago5@intel.com> Date: Thu, 20 Jul 2017 14:15:54 -0700 To: Mauro Carvalho Chehab Cc: Aristeu Rozanski , "rjw@rjwysocki.net" , "srinivas.pandruvada@linux.intel.com" , "lenb@kernel.org" , "linux-acpi@vger.kernel.org" , "linux-edac@vger.kernel.org" List-ID: T24gV2VkLCBKdWwgMTksIDIwMTcgYXQgMDE6MDI6NDVQTSAtMDMwMCwgTWF1cm8gQ2FydmFsaG8g Q2hlaGFiIHdyb3RlOgo+IFRvbnkvQXJpcywKPiAKPiBJIGdvdCB5ZXN0ZXJkYXkgYW4gSFAgTUwz NTAgRzksIGVxdWlwcGVkIHdpdGggU2FuZHkgQnJpZGdlIEVQIENQVXMgKEU1LTI2NDB2NCkuCj4g SSdtIHJ1bm5pbmcgS2VybmVsIDQuMTEgdGhlcmUuCj4gCj4gQUZBSUtULCBTYW5keSBCcmlkZ2Ug RVAgaGFzIDQgY2hhbm5lbHMgcGVyIG1lbW9yeSBjb250cm9sbGVyLCByaWdodD8KPiBUaGF0IHdv dWxkIG1hdGNoIHRoZSBudW1iZXIgb2YgbWVtb3J5IHNsb3RzIG9uIHRoaXMgbWFjaGluZSAoMjQg c2xvdHMpLgo+IAo+IFlldCwgRURBQyBpcyBvbmx5IGlkZW50aWZ5aW5nIDMgY2hhbm5lbHMgcGVy IENQVToKPiAKPiAgJCAgcmFzLW1jLWN0bCAtLWxheW91dAo+ICAgICAgICArLS0tLS0tLS0tLS0t LS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0t LS0rCj4gICAgICAgIHwgICAgICAgICAgICAgICAgbWMwICAgICAgICAgICAgICAgIHwgICAgICAg ICAgICAgICAgbWMxICAgICAgICAgICAgICAgIHwKPiAgICAgICAgfCBjaGFubmVsMCAgfCBjaGFu bmVsMSAgfCBjaGFubmVsMiAgfCBjaGFubmVsMCAgfCBjaGFubmVsMSAgfCBjaGFubmVsMiAgfAo+ IC0tLS0tLS0rLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0t LS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0rCj4gc2xvdDI6IHwgICAgIDAgTUIgIHwgICAgIDAgTUIg IHwgICAgIDAgTUIgIHwgICAgIDAgTUIgIHwgICAgIDAgTUIgIHwgICAgIDAgTUIgIHwKPiBzbG90 MTogfCAgICAgMCBNQiAgfCAgICAgMCBNQiAgfCAgICAgMCBNQiAgfCAgICAgMCBNQiAgfCAgICAg MCBNQiAgfCAgICAgMCBNQiAgfAo+IHNsb3QwOiB8ICAxNjM4NCBNQiAgfCAgICAgMCBNQiAgfCAg MTYzODQgTUIgIHwgIDE2Mzg0IE1CICB8ICAgICAwIE1CICB8ICAxNjM4NCBNQiAgfAo+IC0tLS0t LS0rLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0t LS0tLS0tLS0tLS0tLS0tLS0tLS0tKwo+IAo+IFNvLCBpdCBzZWVtcyB0aGF0IGVpdGhlciB0aGUg QklPUyBpcyBoaWRkZW4gdGhlIG90aGVyIGNoYW5uZWwgb3IKPiB0aGVyZSdzIHNvbWV0aGluZyB3 cm9uZyB3aXRoIFNhbmR5QnJpZGdlIEVQIHN1cHBvcnQgYXQgc2JfZWRhYyBkcml2ZXIuCgpEb2Vz IGxzcGNpIHNob3cgYWxsIGZvdXIgb2YgdGhlc2UgZGV2aWNlcz8KCmluY2x1ZGUvbGludXgvcGNp X2lkcy5oOiNkZWZpbmUgUENJX0RFVklDRV9JRF9JTlRFTF9TQlJJREdFX0lNQ19UQUQwICAgIDB4 M2NhYSAgLyogMTUuMiAqLwppbmNsdWRlL2xpbnV4L3BjaV9pZHMuaDojZGVmaW5lIFBDSV9ERVZJ Q0VfSURfSU5URUxfU0JSSURHRV9JTUNfVEFEMSAgICAweDNjYWIgIC8qIDE1LjMgKi8KaW5jbHVk ZS9saW51eC9wY2lfaWRzLmg6I2RlZmluZSBQQ0lfREVWSUNFX0lEX0lOVEVMX1NCUklER0VfSU1D X1RBRDIgICAgMHgzY2FjICAvKiAxNS40ICovCmluY2x1ZGUvbGludXgvcGNpX2lkcy5oOiNkZWZp bmUgUENJX0RFVklDRV9JRF9JTlRFTF9TQlJJREdFX0lNQ19UQUQzICAgIDB4M2NhZCAgLyogMTUu NSAqLwoKVGhlcmUgc2hvdWxkIGJlIHR3byBvZiBlYWNoIChvbmUgb24gYnVzIDdmLCB0aGUgb3Ro ZXIgb24gYnVzIGZmKS4KCi1Ub255Ci0tLQpUbyB1bnN1YnNjcmliZSBmcm9tIHRoaXMgbGlzdDog c2VuZCB0aGUgbGluZSAidW5zdWJzY3JpYmUgbGludXgtZWRhYyIgaW4KdGhlIGJvZHkgb2YgYSBt ZXNzYWdlIHRvIG1ham9yZG9tb0B2Z2VyLmtlcm5lbC5vcmcKTW9yZSBtYWpvcmRvbW8gaW5mbyBh dCAgaHR0cDovL3ZnZXIua2VybmVsLm9yZy9tYWpvcmRvbW8taW5mby5odG1sCg==