From: Cornelia Huck <cohuck@redhat.com>
To: Halil Pasic <pasic@linux.vnet.ibm.com>
Cc: Christian Borntraeger <borntraeger@de.ibm.com>,
Dong Jia Shi <bjsdjshi@linux.vnet.ibm.com>,
qemu-devel@nongnu.org
Subject: Re: [Qemu-devel] [PATCH 2/2] s390x/css: fix bits must be zero check for TIC
Date: Thu, 27 Jul 2017 15:45:28 +0200 [thread overview]
Message-ID: <20170727154528.705f4fd2@gondolin> (raw)
In-Reply-To: <195c50a3-e99e-5928-af49-912746dc076d@linux.vnet.ibm.com>
On Thu, 27 Jul 2017 15:40:33 +0200
Halil Pasic <pasic@linux.vnet.ibm.com> wrote:
> [Re-posting my previous reply because I've accidentally
> dropped almost all addressees.]
>
> On 07/27/2017 10:01 AM, Cornelia Huck wrote:
> > On Wed, 26 Jul 2017 00:44:42 +0200
> > Halil Pasic <pasic@linux.vnet.ibm.com> wrote:
> >
> >> According to the PoP bit positions 0-3 and 8-32 of the format-1 CCW must
> >> contain zeros. Bits 0-3 are already covered by cmd_code validity
> >> checking, and bit 32 is covered by the CCW address checking.
> >>
> >> Bits 8-31 correspond to CCW1.flags and CCW1.count. Currently we only
> >> check for the absence of certain flags. Let's fix this.
> >>
> >> Signed-off-by: Halil Pasic <pasic@linux.vnet.ibm.com>
> >> ---
> >> hw/s390x/css.c | 3 ++-
> >> 1 file changed, 2 insertions(+), 1 deletion(-)
> >>
> >> diff --git a/hw/s390x/css.c b/hw/s390x/css.c
> >> index d17e21b7af..1f04ce4a1b 100644
> >> --- a/hw/s390x/css.c
> >> +++ b/hw/s390x/css.c
> >> @@ -884,7 +884,8 @@ static int css_interpret_ccw(SubchDev *sch, hwaddr ccw_addr,
> >> ret = -EINVAL;
> >> break;
> >> }
> >> - if (ccw.flags & (CCW_FLAG_CC | CCW_FLAG_DC)) {
> >> + if (ccw.flags || ccw.count) {
> >> + /* We have already sanitized these if fmt 0. */
> >
> > I'd tweak that to
> >
> > /* We have already sanitized these if converted from fmt 0. */
> >
>
> Fine with me.
>
> > Seems less confusing.
> >
> >> ret = -EINVAL;
> >> break;
> >> }
> >
> > I'm inclined to pick this as a 2.10 bugfix. Patch 1 still needs work
> > from what I've seen.
> >
>
> Hm. The commit message becomes inaccurate if this goes in before
> patch 1. We still have must be zero bits which should be handled
> by the address (ccw.cda) checking. I think I can fix patch 1 today.
>
It's probably a bit much for now.
Can you rather suggest a better commit message?
next prev parent reply other threads:[~2017-07-27 13:45 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-07-25 22:44 [Qemu-devel] [PATCH 0/2] ccw interpretation AR compliance improvements Halil Pasic
2017-07-25 22:44 ` [Qemu-devel] [PATCH 1/2] s390x/css: check ccw address validity Halil Pasic
2017-07-26 3:31 ` Dong Jia Shi
2017-07-26 12:05 ` Halil Pasic
2017-07-26 16:45 ` Halil Pasic
2017-07-27 1:03 ` Dong Jia Shi
2017-07-25 22:44 ` [Qemu-devel] [PATCH 2/2] s390x/css: fix bits must be zero check for TIC Halil Pasic
2017-07-26 3:01 ` Dong Jia Shi
2017-07-26 11:38 ` Halil Pasic
2017-07-27 0:41 ` Dong Jia Shi
2017-07-27 8:01 ` Cornelia Huck
2017-07-27 11:18 ` Halil Pasic
2017-07-27 13:40 ` Halil Pasic
2017-07-27 13:45 ` Cornelia Huck [this message]
2017-07-27 8:32 ` Cornelia Huck
2017-07-27 8:43 ` Dong Jia Shi
2017-07-27 8:26 ` [Qemu-devel] [PATCH 0/2] ccw interpretation AR compliance improvements Cornelia Huck
2017-07-27 11:34 ` Halil Pasic
2017-07-27 13:18 ` Halil Pasic
2017-07-27 13:40 ` Cornelia Huck
2017-07-27 13:52 ` Halil Pasic
2017-07-27 14:24 ` Cornelia Huck
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