From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753519AbdHNQCG (ORCPT ); Mon, 14 Aug 2017 12:02:06 -0400 Received: from foss.arm.com ([217.140.101.70]:41404 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752945AbdHNQCE (ORCPT ); Mon, 14 Aug 2017 12:02:04 -0400 Date: Mon, 14 Aug 2017 17:02:02 +0100 From: Will Deacon To: Waiman Long Cc: Peter Zijlstra , Ingo Molnar , linux-kernel@vger.kernel.org, Pan Xinhui , Boqun Feng , Andrea Parri Subject: Re: [RESEND PATCH v5] locking/pvqspinlock: Relax cmpxchg's to improve performance on some archs Message-ID: <20170814160202.GB27527@arm.com> References: <1495633108-12818-1-git-send-email-longman@redhat.com> <20170810115034.ie65wfxepiq6noew@hirez.programming.kicks-ass.net> <945c28c3-5779-c8c8-13bb-40477abd1f0e@redhat.com> <20170810161524.2wzocpcxrliy7nt6@hirez.programming.kicks-ass.net> <7cb318a8-d5b9-0019-a537-1720fc5222cc@redhat.com> <73daa6e6-537e-b0ce-e1e0-7afa75334509@redhat.com> <20170811090601.2owslxi4lgv3kond@hirez.programming.kicks-ass.net> <20170814120121.GA24249@arm.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.5.23 (2014-03-12) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Mon, Aug 14, 2017 at 11:01:10AM -0400, Waiman Long wrote: > On 08/14/2017 08:01 AM, Will Deacon wrote: > > On Fri, Aug 11, 2017 at 11:06:01AM +0200, Peter Zijlstra wrote: > >> On Thu, Aug 10, 2017 at 02:18:30PM -0400, Waiman Long wrote: > >>> On 08/10/2017 12:22 PM, Waiman Long wrote: > >>>> On 08/10/2017 12:15 PM, Peter Zijlstra wrote: > >>>>> Might as well do an explicit: > >>>>> > >>>>> smp_mb__before_atomic() > >>>>> cmpxchg_relaxed() > >>>>> smp_mb__after_atomic() > >>>>> > >>>>> I suppose and not introduce new primitives. > >>> I think we don't need smp_mb__after_atomic(). The read has to be fully > >>> ordered, but the write part may not need it as the control dependency of > >>> the old value should guard against incorrect action. Right? > >> You'd think that, but IIRC there was something funny about using the SC > >> return flag for control dependencies. Will? > > Yeah, that's right, you can't use the STXR status flag to create control > > dependencies. > > > > Will > > Actually, the code sequence that I plan to use are: > > smp_mb__before_atomic(); > if (cmpxchg_relaxed(&pn->state, vcpu_halted, vcpu_hashed) > != vcpu_halted) > return; > > WRITE_ONCE(l->locked, _Q_SLOW_VAL); > (void)pv_hash(lock, pn); > > I am planning to use the comparison of the returned value (pn->state) > again vcpu_halted as the control dependency. I don't see how the status > flag of STXR is affecting this. Thanks for the context. I agree that you've got a control dependency in this case, so the WRITE_ONCE will be ordered after the LL part of the cmpxchg. It could still be reordered with respect to the write part, however. Will