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From: Yi Sun <yi.y.sun@linux.intel.com>
To: "Roger Pau Monn�" <roger.pau@citrix.com>
Cc: kevin.tian@intel.com, wei.liu2@citrix.com,
	andrew.cooper3@citrix.com, dario.faggioli@citrix.com,
	ian.jackson@eu.citrix.com, julien.grall@arm.com,
	mengxu@cis.upenn.edu, jbeulich@suse.com,
	chao.p.peng@linux.intel.com, xen-devel@lists.xenproject.org
Subject: Re: [PATCH v2 04/15] x86: implement data structure and CPU init flow for MBA
Date: Wed, 30 Aug 2017 13:31:51 +0800	[thread overview]
Message-ID: <20170830053151.GD11396@yi.y.sun> (raw)
In-Reply-To: <20170829134432.x4hnyy2g4oszwbrt@MacBook-Pro-de-Roger.local>

On 17-08-29 14:44:32, Roger Pau Monn� wrote:
> On Thu, Aug 24, 2017 at 09:14:38AM +0800, Yi Sun wrote:
> > +#define MBA_LINEAR         (1u << 2)
> 
> Why is this shifted by 2?
> 
This is used to mask ECX register to know if MBA linear mode is set or not.

> > +    union {
> > +        struct {
> > +            /* The length of CBM got through CPUID. */
> > +            unsigned int cbm_len;
> > +        } cat_info;
> > +
> > +        struct {
> > +            /* The max throttling value got through CPUID. */
> > +            unsigned int thrtl_max;
> > +            unsigned int linear;
> 
> This seems like it wants to be a boolean?
> 
Ok, will change it to bool.

> > +        } mba_info;
> 
> Just naming the fields 'cat' and 'mba' would probably be enough IMHO,
> but that's just taste I think, and I won't argue if you prefer to
> leave them with the _info suffix.
> 
Got it, thanks!

> > +    /* We reserve cos=0 as default thrtl (0) which means no delay. */
> > +    feat->cos_reg_val[0] = 0;
> > +    wrmsrl(MSR_IA32_PSR_MBA_MASK(0), 0);
> > +
> > +    /* Add this feature into array. */
> > +    info->features[type] = feat;
> > +
> > +    if ( !opt_cpu_info )
> > +        return 0;
> > +
> > +    printk(XENLOG_INFO "MBA: enabled on socket %u, cos_max:%u,"
> > +           "thrtl_max:%u, linear:%u.\n",
> 
> Please try to avoid splitting messages, it makes it hard to grep for
> them afterward.
> 
Ok, but that would exceed 80 characters. Is that acceptable?

> > +/* MBA props */
> > +static bool mba_get_feat_info(const struct feat_node *feat,
> > +                              uint32_t data[], unsigned int array_len)
> > +{
> > +    return false;
> > +}
> 
> Shouldn't this return thrtl_max and whether it's linear?
> 
> > +
> > +static void mba_write_msr(unsigned int cos, uint32_t val,
> > +                          enum psr_val_type type)
> > +{
> 
> And this perform the MSR write? (MSR_IA32_PSR_MBA_MASK...)
> 
Because the patches may not be applied one go. I have to implement these
empty functions and register them into 'mba_props' to avoid crash. IIRC, this
was suggested by Jan before.

> Roger.

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  parent reply	other threads:[~2017-08-30  5:32 UTC|newest]

Thread overview: 64+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-08-24  1:14 [PATCH v2 00/15] Enable Memory Bandwidth Allocation in Xen Yi Sun
2017-08-24  1:14 ` [PATCH v2 01/15] docs: create Memory Bandwidth Allocation (MBA) feature document Yi Sun
2017-08-29 11:46   ` Roger Pau Monné
2017-08-30  5:20     ` Yi Sun
2017-08-30  7:42       ` Roger Pau Monn�
2017-08-24  1:14 ` [PATCH v2 02/15] Rename PSR sysctl/domctl interfaces and xsm policy to make them be general Yi Sun
2017-08-29 12:00   ` Roger Pau Monné
2017-08-30  5:23     ` Yi Sun
2017-08-30  7:47       ` Roger Pau Monn�
2017-08-30  8:14         ` Yi Sun
2017-08-24  1:14 ` [PATCH v2 03/15] x86: rename 'cbm_type' to 'psr_val_type' to make it general Yi Sun
2017-08-29 12:15   ` Roger Pau Monné
2017-08-30  5:47     ` Yi Sun
2017-08-30  7:51       ` Roger Pau Monn�
2017-08-30  8:14         ` Yi Sun
2017-08-24  1:14 ` [PATCH v2 04/15] x86: implement data structure and CPU init flow for MBA Yi Sun
2017-08-29 13:44   ` Roger Pau Monné
2017-08-29 13:58     ` Jan Beulich
2017-08-30  6:07       ` Yi Sun
2017-08-30  5:31     ` Yi Sun [this message]
2017-08-30  7:55       ` Roger Pau Monn�
2017-08-30  8:19         ` Yi Sun
2017-08-30  8:45         ` Jan Beulich
2017-08-24  1:14 ` [PATCH v2 05/15] x86: implement get hw info " Yi Sun
2017-08-29 15:01   ` Roger Pau Monné
2017-08-30  5:33     ` Yi Sun
2017-08-24  1:14 ` [PATCH v2 06/15] x86: implement get value interface " Yi Sun
2017-08-29 15:04   ` Roger Pau Monné
2017-08-24  1:14 ` [PATCH v2 07/15] x86: implement set value flow " Yi Sun
2017-08-30  8:31   ` Roger Pau Monné
2017-08-31  2:20     ` Yi Sun
2017-08-31  8:30       ` Roger Pau Monn�
2017-08-31  9:13         ` Yi Sun
2017-08-31  9:30           ` Roger Pau Monn�
2017-08-31 10:10             ` Yi Sun
2017-08-31 10:19               ` Roger Pau Monn�
2017-08-24  1:14 ` [PATCH v2 08/15] tools: create general interfaces to support psr allocation features Yi Sun
2017-08-30  8:42   ` Roger Pau Monné
2017-08-31  2:38     ` Yi Sun
2017-08-31  8:37       ` Roger Pau Monn�
2017-09-04  2:09         ` Yi Sun
2017-09-04  8:43           ` Wei Liu
2017-08-24  1:14 ` [PATCH v2 09/15] tools: implement the new libxc get hw info interface Yi Sun
2017-08-30  8:58   ` Roger Pau Monné
2017-08-31  3:05     ` Yi Sun
2017-08-24  1:14 ` [PATCH v2 10/15] tools: implement the new libxl " Yi Sun
2017-08-30  9:15   ` Roger Pau Monné
2017-08-31  3:16     ` Yi Sun
2017-08-31  8:40       ` Roger Pau Monn�
2017-08-31  9:19         ` Yi Sun
2017-08-31  9:32           ` Roger Pau Monn�
2017-08-31 10:11             ` Yi Sun
2017-08-24  1:14 ` [PATCH v2 11/15] tools: implement the new xl " Yi Sun
2017-08-30  9:23   ` Roger Pau Monné
2017-08-31  5:57     ` Yi Sun
2017-08-31  8:43       ` Roger Pau Monn�
2017-08-31  9:24         ` Yi Sun
2017-08-24  1:14 ` [PATCH v2 12/15] tools: rename 'xc_psr_cat_type' to 'xc_psr_val_type' Yi Sun
2017-08-30  9:24   ` Roger Pau Monné
2017-08-24  1:14 ` [PATCH v2 13/15] tools: implement new generic get value interface and MBA get value command Yi Sun
2017-08-24  1:14 ` [PATCH v2 14/15] tools: implement new generic set value interface and MBA set " Yi Sun
2017-08-30  9:47   ` Roger Pau Monné
2017-08-31  5:58     ` Yi Sun
2017-08-24  1:14 ` [PATCH v2 15/15] docs: add MBA description in docs Yi Sun

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