From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751928AbdIMVgG (ORCPT ); Wed, 13 Sep 2017 17:36:06 -0400 Received: from Galois.linutronix.de ([146.0.238.70]:40289 "EHLO Galois.linutronix.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751845AbdIMVfT (ORCPT ); Wed, 13 Sep 2017 17:35:19 -0400 Message-Id: <20170913213156.273454591@linutronix.de> User-Agent: quilt/0.63-1 Date: Wed, 13 Sep 2017 23:29:52 +0200 From: Thomas Gleixner To: LKML Cc: Ingo Molnar , Peter Anvin , Marc Zyngier , Peter Zijlstra , Borislav Petkov , Chen Yu , Rui Zhang , "Rafael J. Wysocki" , Len Brown , Dan Williams , Christoph Hellwig , Paolo Bonzini , Joerg Roedel , Boris Ostrovsky , Juergen Gross , Tony Luck , "K. Y. Srinivasan" , Alok Kataria , Steven Rostedt , Arjan van de Ven Subject: [patch 50/52] x86/vector: Switch IOAPIC to global reservation mode References: <20170913212902.530704676@linutronix.de> MIME-Version: 1.0 Content-Type: text/plain; charset=ISO-8859-15 Content-Disposition: inline; filename=x86-vector--Switch-IOAPIC-to-global-reservation-mode.patch Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org IOAPICs install and allocate vectors for inactive interrupts. This results in problems on CPU offline and wastes vector resources for nothing. Handle inactive IOAPIC interrupts in the same way as inactive MSI interrupts and switch them to the global reservation mode. Signed-off-by: Thomas Gleixner --- arch/x86/kernel/apic/vector.c | 56 ++++++++++++++++++++++++------------------ 1 file changed, 33 insertions(+), 23 deletions(-) Index: b/arch/x86/kernel/apic/vector.c =================================================================== --- a/arch/x86/kernel/apic/vector.c +++ b/arch/x86/kernel/apic/vector.c @@ -258,17 +258,6 @@ static int assign_irq_vector_any_locked( return assign_vector_locked(irqd, cpu_online_mask); } -static int assign_irq_vector_any(struct irq_data *irqd) -{ - unsigned long flags; - int ret; - - raw_spin_lock_irqsave(&vector_lock, flags); - ret = assign_irq_vector_any_locked(irqd); - raw_spin_unlock_irqrestore(&vector_lock, flags); - return ret; -} - static int assign_irq_vector_policy(struct irq_data *irqd, struct irq_alloc_info *info) { @@ -276,10 +265,10 @@ assign_irq_vector_policy(struct irq_data return reserve_managed_vector(irqd); if (info->mask) return assign_irq_vector(irqd, info->mask); - if (info->type != X86_IRQ_ALLOC_TYPE_MSI && - info->type != X86_IRQ_ALLOC_TYPE_MSIX) - return assign_irq_vector_any(irqd); - /* For MSI(X) make only a global reservation with no guarantee */ + /* + * Make only a global reservation with no guarantee. A real vector + * is associated at activation time. + */ return reserve_irq_vector(irqd); } @@ -456,13 +445,39 @@ static void x86_vector_free_irqs(struct } } +static bool vector_configure_legacy(unsigned int virq, struct irq_data *irqd, + struct apic_chip_data *apicd) +{ + unsigned long flags; + bool realloc = false; + + apicd->vector = ISA_IRQ_VECTOR(virq); + apicd->cpu = 0; + apicd->can_reserve = true; + + raw_spin_lock_irqsave(&vector_lock, flags); + /* + * If the interrupt is activated, then it must stay at this vector + * position. That's usually the timer interrupt (0). + */ + if (irqd_is_activated(irqd)) { + trace_vector_setup(virq, true, 0); + apic_update_irq_cfg(irqd, apicd->vector, apicd->cpu); + } else { + /* Release the vector */ + clear_irq_vector(irqd); + realloc = true; + } + raw_spin_unlock_irqrestore(&vector_lock, flags); + return realloc; +} + static int x86_vector_alloc_irqs(struct irq_domain *domain, unsigned int virq, unsigned int nr_irqs, void *arg) { struct irq_alloc_info *info = arg; struct apic_chip_data *apicd; struct irq_data *irqd; - unsigned long flags; int i, err, node; if (disable_apic) @@ -496,13 +511,8 @@ static int x86_vector_alloc_irqs(struct * config. */ if (info->flags & X86_IRQ_ALLOC_LEGACY) { - apicd->vector = ISA_IRQ_VECTOR(virq + i); - apicd->cpu = 0; - trace_vector_setup(virq + i, true, 0); - raw_spin_lock_irqsave(&vector_lock, flags); - apic_update_irq_cfg(irqd, apicd->vector, apicd->cpu); - raw_spin_unlock_irqrestore(&vector_lock, flags); - continue; + if (!vector_configure_legacy(virq + i, irqd, apicd)) + continue; } err = assign_irq_vector_policy(irqd, info);