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From: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCH] serial: serial_sh: take into account port->clk_mode for SH7785/7786
Date: Thu, 14 Sep 2017 00:27:45 +0200	[thread overview]
Message-ID: <20170914002745.23eb3c64@windsurf> (raw)
In-Reply-To: <20170828121638.13751-1-thomas.petazzoni@free-electrons.com>

Hello,

On Mon, 28 Aug 2017 14:16:38 +0200, Thomas Petazzoni wrote:
> In the SH7785/SH7786 case, the SCSCR value is harcoded to be 0x3a,
> which means bits CKE1/CKE0 have the value 10b. This tells the SCIF
> that the "External clock/SCIF_SCK pin functions as clock input".
> 
> However, this is not the case in all designs, and it's the purpose of
> the clk_mode = EXT_CLK to indicate such a setting.
> 
> In order for the serial_sh driver to work on a SH7786 platform that
> does not use SCIF_SCK as a clock input, we have to adjust the
> SCSCR_INIT value, to have CKE1/CKE0 set to 00b. This is similar to
> what is done for other SH platforms.
> 
> Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>

Any comments on this patch ?

Thanks,

Thomas
-- 
Thomas Petazzoni, CTO, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com

  reply	other threads:[~2017-09-13 22:27 UTC|newest]

Thread overview: 4+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-08-28 12:16 [U-Boot] [PATCH] serial: serial_sh: take into account port->clk_mode for SH7785/7786 Thomas Petazzoni
2017-09-13 22:27 ` Thomas Petazzoni [this message]
2017-09-22 22:19   ` Nobuhiro Iwamatsu
2017-09-24 13:09     ` Thomas Petazzoni

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