Re: [RFC PATCH v3] membarrier: provide core serialization

[Will Deacon <will.deacon@arm.com>]

On Thu, Sep 07, 2017 at 05:03:49PM -0700, Hans Boehm wrote:
> > [Mathieu: ]
> >
> > Assuming we don't need a sync core before updating the old code, an
> > aggressive approach would be:
> >
> > reclaim and re-use (aggressive):
> >
> > 1- userspace unpublish all reference to old code,
> > 2- userspace ensure no thread use the old code anymore (e.g. URCU),
> > 3- userspace updates old code -> new code
> > 4- issue data cache flush for the modified range (if needed)
> > 5- sys_membarrier
> >    - for each executing threads
> >       - issue core serializing barrier
> > 6- issue instruction cache flush for the modified range (if needed)
> >    (may be required on all active threads on some architectures)
> > 7- userspace publish reference to new code
> >
> My assumption was that right sequence here, at least on Aarch64, is to
> do 5 and 6 in the opposite order; flush the icache,which I believe can
> be done from the thread that wrote the code, and then issue a sys_membarrier
> for the core serializing barrier.
> 
> It would be useful to get that clarified.

FWIW, Mathieu and I spent a while talking about this during LPC last week
and ended up agreeing that the ISB (core serialisation) is required *after*
the cache-maintenance to publish the new code has completed.

Will