From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S933070AbdIRRBV (ORCPT ); Mon, 18 Sep 2017 13:01:21 -0400 Received: from usa-sjc-mx-foss1.foss.arm.com ([217.140.101.70]:41222 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932904AbdIRRBT (ORCPT ); Mon, 18 Sep 2017 13:01:19 -0400 Date: Mon, 18 Sep 2017 18:01:30 +0100 From: Will Deacon To: Hans Boehm Cc: Mathieu Desnoyers , "Paul E. McKenney" , Peter Zijlstra , linux-kernel , Boqun Feng , Andrew Hunter , maged michael , gromer , Avi Kivity , Benjamin Herrenschmidt , Paul Mackerras , Michael Ellerman , Dave Watson , Andy Lutomirski , Russell King , Greg Hackmann Subject: Re: [RFC PATCH v3] membarrier: provide core serialization Message-ID: <20170918170129.GF11343@arm.com> References: <20170901161007.2661-1-mathieu.desnoyers@efficios.com> <20170901162547.GA20313@arm.com> <1051991998.1330.1504285238477.JavaMail.zimbra@efficios.com> <20170901171048.GA20817@arm.com> <238182999.1493.1504291547065.JavaMail.zimbra@efficios.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.5.23 (2014-03-12) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Thu, Sep 07, 2017 at 05:03:49PM -0700, Hans Boehm wrote: > > [Mathieu: ] > > > > Assuming we don't need a sync core before updating the old code, an > > aggressive approach would be: > > > > reclaim and re-use (aggressive): > > > > 1- userspace unpublish all reference to old code, > > 2- userspace ensure no thread use the old code anymore (e.g. URCU), > > 3- userspace updates old code -> new code > > 4- issue data cache flush for the modified range (if needed) > > 5- sys_membarrier > > - for each executing threads > > - issue core serializing barrier > > 6- issue instruction cache flush for the modified range (if needed) > > (may be required on all active threads on some architectures) > > 7- userspace publish reference to new code > > > My assumption was that right sequence here, at least on Aarch64, is to > do 5 and 6 in the opposite order; flush the icache,which I believe can > be done from the thread that wrote the code, and then issue a sys_membarrier > for the core serializing barrier. > > It would be useful to get that clarified. FWIW, Mathieu and I spent a while talking about this during LPC last week and ended up agreeing that the ISB (core serialisation) is required *after* the cache-maintenance to publish the new code has completed. Will