From: David Gibson <david@gibson.dropbear.id.au>
To: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Cc: qemu-devel@nongnu.org, qemu-ppc@nongnu.org, benh@kernel.crashing.org
Subject: Re: [Qemu-devel] [PATCH 6/8] ppc: Fix OpenPIC model
Date: Tue, 19 Sep 2017 06:37:49 +1000 [thread overview]
Message-ID: <20170918203749.GI15823@umbus> (raw)
In-Reply-To: <1505668548-16616-7-git-send-email-mark.cave-ayland@ilande.co.uk>
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On Sun, Sep 17, 2017 at 06:15:46PM +0100, Mark Cave-Ayland wrote:
> From: Benjamin Herrenschmidt <benh@kernel.crashing.org>
>
> Apple uses an IBM MPIC2A without timers, it has 64 sources.
>
> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Applied to ppc-for-2.11.
> ---
> hw/intc/openpic.c | 35 +++++++++++++++++++++++++++++++++++
> hw/ppc/mac_newworld.c | 2 +-
> include/hw/ppc/openpic.h | 1 +
> 3 files changed, 37 insertions(+), 1 deletion(-)
>
> diff --git a/hw/intc/openpic.c b/hw/intc/openpic.c
> index 9dd285b..10d6e87 100644
> --- a/hw/intc/openpic.c
> +++ b/hw/intc/openpic.c
> @@ -92,6 +92,16 @@ static int get_current_cpu(void);
> #define RAVEN_MAX_TMR OPENPIC_MAX_TMR
> #define RAVEN_MAX_IPI OPENPIC_MAX_IPI
>
> +/* KeyLargo */
> +#define KEYLARGO_MAX_CPU 4
> +#define KEYLARGO_MAX_EXT 64
> +#define KEYLARGO_MAX_IPI 4
> +#define KEYLARGO_MAX_IRQ (64 + KEYLARGO_MAX_IPI)
> +#define KEYLARGO_MAX_TMR 0
> +#define KEYLARGO_IPI_IRQ (KEYLARGO_MAX_EXT) /* First IPI IRQ */
> +/* Timers don't exist but this makes the code happy... */
> +#define KEYLARGO_TMR_IRQ (KEYLARGO_IPI_IRQ + KEYLARGO_MAX_IPI)
> +
> /* Interrupt definitions */
> #define RAVEN_FE_IRQ (RAVEN_MAX_EXT) /* Internal functional IRQ */
> #define RAVEN_ERR_IRQ (RAVEN_MAX_EXT + 1) /* Error IRQ */
> @@ -120,6 +130,7 @@ static FslMpicInfo fsl_mpic_42 = {
> #define VID_REVISION_1_3 3
>
> #define VIR_GENERIC 0x00000000 /* Generic Vendor ID */
> +#define VIR_MPIC2A 0x00004614 /* IBM MPIC-2A */
>
> #define GCR_RESET 0x80000000
> #define GCR_MODE_PASS 0x00000000
> @@ -329,6 +340,8 @@ typedef struct OpenPICState {
> uint32_t nb_cpus;
> /* Timer registers */
> OpenPICTimer timers[OPENPIC_MAX_TMR];
> + uint32_t max_tmr;
> +
> /* Shared MSI registers */
> OpenPICMSI msi[MAX_MSI];
> uint32_t max_irq;
> @@ -1717,6 +1730,28 @@ static void openpic_realize(DeviceState *dev, Error **errp)
>
> map_list(opp, list_le, &list_count);
> break;
> +
> + case OPENPIC_MODEL_KEYLARGO:
> + opp->nb_irqs = KEYLARGO_MAX_EXT;
> + opp->vid = VID_REVISION_1_2;
> + opp->vir = VIR_GENERIC;
> + opp->vector_mask = 0xFF;
> + opp->tfrr_reset = 4160000;
> + opp->ivpr_reset = IVPR_MASK_MASK | IVPR_MODE_MASK;
> + opp->idr_reset = 0;
> + opp->max_irq = KEYLARGO_MAX_IRQ;
> + opp->irq_ipi0 = KEYLARGO_IPI_IRQ;
> + opp->irq_tim0 = KEYLARGO_TMR_IRQ;
> + opp->brr1 = -1;
> + opp->mpic_mode_mask = GCR_MODE_MIXED;
> +
> + if (opp->nb_cpus != 1) {
> + error_setg(errp, "Only UP supported today");
> + return;
> + }
> +
> + map_list(opp, list_le, &list_count);
> + break;
> }
>
> for (i = 0; i < opp->nb_cpus; i++) {
> diff --git a/hw/ppc/mac_newworld.c b/hw/ppc/mac_newworld.c
> index c581d96..62bd8d3 100644
> --- a/hw/ppc/mac_newworld.c
> +++ b/hw/ppc/mac_newworld.c
> @@ -351,7 +351,7 @@ static void ppc_core99_init(MachineState *machine)
> pic = g_new0(qemu_irq, 64);
>
> dev = qdev_create(NULL, TYPE_OPENPIC);
> - qdev_prop_set_uint32(dev, "model", OPENPIC_MODEL_RAVEN);
> + qdev_prop_set_uint32(dev, "model", OPENPIC_MODEL_KEYLARGO);
> qdev_init_nofail(dev);
> s = SYS_BUS_DEVICE(dev);
> pic_mem = s->mmio[0].memory;
> diff --git a/include/hw/ppc/openpic.h b/include/hw/ppc/openpic.h
> index 6137e2d..e55ce54 100644
> --- a/include/hw/ppc/openpic.h
> +++ b/include/hw/ppc/openpic.h
> @@ -20,6 +20,7 @@ enum {
> #define OPENPIC_MODEL_RAVEN 0
> #define OPENPIC_MODEL_FSL_MPIC_20 1
> #define OPENPIC_MODEL_FSL_MPIC_42 2
> +#define OPENPIC_MODEL_KEYLARGO 3
>
> #define OPENPIC_MAX_SRC 256
> #define OPENPIC_MAX_TMR 4
--
David Gibson | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
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next prev parent reply other threads:[~2017-09-19 10:36 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-09-17 17:15 [Qemu-devel] [PATCH 0/8] ppc: more Mac-related fixups Mark Cave-Ayland
2017-09-17 17:15 ` [Qemu-devel] [PATCH 1/8] ppc: QOMify g3beige machine Mark Cave-Ayland
2017-09-18 3:42 ` Philippe Mathieu-Daudé
2017-09-18 20:25 ` David Gibson
2017-09-17 17:15 ` [Qemu-devel] [PATCH 2/8] ppc/mac: Advertise a high clock frequency for NewWorld Macs Mark Cave-Ayland
2017-09-18 20:25 ` David Gibson
2017-09-17 17:15 ` [Qemu-devel] [PATCH 3/8] ppc/ide/macio: Add missing registers Mark Cave-Ayland
2017-09-18 20:27 ` David Gibson
2017-09-17 17:15 ` [Qemu-devel] [PATCH 4/8] macio: convert pmac_ide_ops from old_mmio Mark Cave-Ayland
2017-09-18 20:36 ` David Gibson
2017-09-19 19:31 ` Mark Cave-Ayland
2017-09-17 17:15 ` [Qemu-devel] [PATCH 5/8] ppc/mac: More rework of the DBDMA emulation Mark Cave-Ayland
2017-09-18 20:37 ` David Gibson
2017-09-17 17:15 ` [Qemu-devel] [PATCH 6/8] ppc: Fix OpenPIC model Mark Cave-Ayland
2017-09-18 20:37 ` David Gibson [this message]
2017-09-17 17:15 ` [Qemu-devel] [PATCH 7/8] openpic: add missing timer fields to vmstate_openpic_timer Mark Cave-Ayland
2017-09-18 22:44 ` David Gibson
2017-09-19 19:50 ` Mark Cave-Ayland
2017-09-20 12:04 ` David Gibson
2017-09-17 17:15 ` [Qemu-devel] [PATCH 8/8] openpic: Fix problem when IRQ transitions from edge to level Mark Cave-Ayland
2017-09-18 20:39 ` David Gibson
2017-09-19 19:52 ` Mark Cave-Ayland
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