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diff for duplicates of <20171002172128.GV8463@localhost.localdomain>

diff --git a/a/1.txt b/N1/1.txt
index 4ddbaee..3564adb 100644
--- a/a/1.txt
+++ b/N1/1.txt
@@ -1,4 +1,4 @@
-On Sun, Oct 01, 2017@09:42:03AM +0200, Christoph Hellwig wrote:
+On Sun, Oct 01, 2017 at 09:42:03AM +0200, Christoph Hellwig wrote:
 > This looks very convoluted, mostly because the existing code is
 > doing weird things.  For one thing what is sq_dma_addr currently
 > is not a DMA adddress - we either need the resource address
@@ -14,7 +14,7 @@ Yah, calling this a DMA address was a misnomer and confusing.
 
 > ---
 > From b78f4164881125c4fecfdb87878d0120b2177c53 Mon Sep 17 00:00:00 2001
-> From: Christoph Hellwig <hch at lst.de>
+> From: Christoph Hellwig <hch@lst.de>
 > Date: Sun, 1 Oct 2017 09:37:35 +0200
 > Subject: nvme-pci: Use PCI bus address for data/queues in CMB
 > 
@@ -31,10 +31,15 @@ Yah, calling this a DMA address was a misnomer and confusing.
 > Based on a report and previous patch from Abhishek Shah.
 > 
 > Fixes: 8ffaadf7 ("NVMe: Use CMB for the IO SQes if available")
-> Cc: stable at vger.kernel.org
-> Reported-by: Abhishek Shah <abhishek.shah at broadcom.com>
-> Signed-off-by: Christoph Hellwig <hch at lst.de>
+> Cc: stable@vger.kernel.org
+> Reported-by: Abhishek Shah <abhishek.shah@broadcom.com>
+> Signed-off-by: Christoph Hellwig <hch@lst.de>
 
 This looks good.
 
-Reviewed-by: Keith Busch <keith.busch at intel.com>
+Reviewed-by: Keith Busch <keith.busch@intel.com>
+
+_______________________________________________
+linux-arm-kernel mailing list
+linux-arm-kernel@lists.infradead.org
+http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
diff --git a/a/content_digest b/N1/content_digest
index 50c502c..980a2c2 100644
--- a/a/content_digest
+++ b/N1/content_digest
@@ -1,11 +1,21 @@
  "ref\01506763722-10687-1-git-send-email-abhishek.shah@broadcom.com\0"
  "ref\020171001074203.GA11115@lst.de\0"
- "From\0keith.busch@intel.com (Keith Busch)\0"
- "Subject\0[PATCH v2] nvme-pci: Use PCI bus address for data/queues in CMB\0"
+ "From\0Keith Busch <keith.busch@intel.com>\0"
+ "Subject\0Re: [PATCH v2] nvme-pci: Use PCI bus address for data/queues in CMB\0"
  "Date\0Mon, 2 Oct 2017 11:21:29 -0600\0"
+ "To\0Christoph Hellwig <hch@lst.de>\0"
+ "Cc\0Sagi Grimberg <sagi@grimberg.me>"
+  linux-pci@vger.kernel.org
+  linux-kernel@vger.kernel.org
+  linux-nvme@lists.infradead.org
+  Jens Axboe <axboe@fb.com>
+  bcm-kernel-feedback-list@broadcom.com
+  stable@vger.kernel.org
+  Abhishek Shah <abhishek.shah@broadcom.com>
+ " linux-arm-kernel@lists.infradead.org\0"
  "\00:1\0"
  "b\0"
- "On Sun, Oct 01, 2017@09:42:03AM +0200, Christoph Hellwig wrote:\n"
+ "On Sun, Oct 01, 2017 at 09:42:03AM +0200, Christoph Hellwig wrote:\n"
  "> This looks very convoluted, mostly because the existing code is\n"
  "> doing weird things.  For one thing what is sq_dma_addr currently\n"
  "> is not a DMA adddress - we either need the resource address\n"
@@ -21,7 +31,7 @@
  "\n"
  "> ---\n"
  "> From b78f4164881125c4fecfdb87878d0120b2177c53 Mon Sep 17 00:00:00 2001\n"
- "> From: Christoph Hellwig <hch at lst.de>\n"
+ "> From: Christoph Hellwig <hch@lst.de>\n"
  "> Date: Sun, 1 Oct 2017 09:37:35 +0200\n"
  "> Subject: nvme-pci: Use PCI bus address for data/queues in CMB\n"
  "> \n"
@@ -38,12 +48,17 @@
  "> Based on a report and previous patch from Abhishek Shah.\n"
  "> \n"
  "> Fixes: 8ffaadf7 (\"NVMe: Use CMB for the IO SQes if available\")\n"
- "> Cc: stable at vger.kernel.org\n"
- "> Reported-by: Abhishek Shah <abhishek.shah at broadcom.com>\n"
- "> Signed-off-by: Christoph Hellwig <hch at lst.de>\n"
+ "> Cc: stable@vger.kernel.org\n"
+ "> Reported-by: Abhishek Shah <abhishek.shah@broadcom.com>\n"
+ "> Signed-off-by: Christoph Hellwig <hch@lst.de>\n"
  "\n"
  "This looks good.\n"
  "\n"
- Reviewed-by: Keith Busch <keith.busch at intel.com>
+ "Reviewed-by: Keith Busch <keith.busch@intel.com>\n"
+ "\n"
+ "_______________________________________________\n"
+ "linux-arm-kernel mailing list\n"
+ "linux-arm-kernel@lists.infradead.org\n"
+ http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
 
-093b52f07ac3488b3a11ac74ecb872cadfcacb04250f63a2e03025ff0107bd0b
+692616cd1c0d11bda7aa62a3229b253c30beb26a8cb1426255ba9d246288f1e4

diff --git a/a/1.txt b/N2/1.txt
index 4ddbaee..95828fe 100644
--- a/a/1.txt
+++ b/N2/1.txt
@@ -1,4 +1,4 @@
-On Sun, Oct 01, 2017@09:42:03AM +0200, Christoph Hellwig wrote:
+On Sun, Oct 01, 2017 at 09:42:03AM +0200, Christoph Hellwig wrote:
 > This looks very convoluted, mostly because the existing code is
 > doing weird things.  For one thing what is sq_dma_addr currently
 > is not a DMA adddress - we either need the resource address
@@ -14,7 +14,7 @@ Yah, calling this a DMA address was a misnomer and confusing.
 
 > ---
 > From b78f4164881125c4fecfdb87878d0120b2177c53 Mon Sep 17 00:00:00 2001
-> From: Christoph Hellwig <hch at lst.de>
+> From: Christoph Hellwig <hch@lst.de>
 > Date: Sun, 1 Oct 2017 09:37:35 +0200
 > Subject: nvme-pci: Use PCI bus address for data/queues in CMB
 > 
@@ -32,9 +32,9 @@ Yah, calling this a DMA address was a misnomer and confusing.
 > 
 > Fixes: 8ffaadf7 ("NVMe: Use CMB for the IO SQes if available")
 > Cc: stable at vger.kernel.org
-> Reported-by: Abhishek Shah <abhishek.shah at broadcom.com>
-> Signed-off-by: Christoph Hellwig <hch at lst.de>
+> Reported-by: Abhishek Shah <abhishek.shah@broadcom.com>
+> Signed-off-by: Christoph Hellwig <hch@lst.de>
 
 This looks good.
 
-Reviewed-by: Keith Busch <keith.busch at intel.com>
+Reviewed-by: Keith Busch <keith.busch@intel.com>
diff --git a/a/content_digest b/N2/content_digest
index 50c502c..8908c05 100644
--- a/a/content_digest
+++ b/N2/content_digest
@@ -3,9 +3,10 @@
  "From\0keith.busch@intel.com (Keith Busch)\0"
  "Subject\0[PATCH v2] nvme-pci: Use PCI bus address for data/queues in CMB\0"
  "Date\0Mon, 2 Oct 2017 11:21:29 -0600\0"
+ "To\0linux-arm-kernel@lists.infradead.org\0"
  "\00:1\0"
  "b\0"
- "On Sun, Oct 01, 2017@09:42:03AM +0200, Christoph Hellwig wrote:\n"
+ "On Sun, Oct 01, 2017 at 09:42:03AM +0200, Christoph Hellwig wrote:\n"
  "> This looks very convoluted, mostly because the existing code is\n"
  "> doing weird things.  For one thing what is sq_dma_addr currently\n"
  "> is not a DMA adddress - we either need the resource address\n"
@@ -21,7 +22,7 @@
  "\n"
  "> ---\n"
  "> From b78f4164881125c4fecfdb87878d0120b2177c53 Mon Sep 17 00:00:00 2001\n"
- "> From: Christoph Hellwig <hch at lst.de>\n"
+ "> From: Christoph Hellwig <hch@lst.de>\n"
  "> Date: Sun, 1 Oct 2017 09:37:35 +0200\n"
  "> Subject: nvme-pci: Use PCI bus address for data/queues in CMB\n"
  "> \n"
@@ -39,11 +40,11 @@
  "> \n"
  "> Fixes: 8ffaadf7 (\"NVMe: Use CMB for the IO SQes if available\")\n"
  "> Cc: stable at vger.kernel.org\n"
- "> Reported-by: Abhishek Shah <abhishek.shah at broadcom.com>\n"
- "> Signed-off-by: Christoph Hellwig <hch at lst.de>\n"
+ "> Reported-by: Abhishek Shah <abhishek.shah@broadcom.com>\n"
+ "> Signed-off-by: Christoph Hellwig <hch@lst.de>\n"
  "\n"
  "This looks good.\n"
  "\n"
- Reviewed-by: Keith Busch <keith.busch at intel.com>
+ Reviewed-by: Keith Busch <keith.busch@intel.com>
 
-093b52f07ac3488b3a11ac74ecb872cadfcacb04250f63a2e03025ff0107bd0b
+79027ee165ba65c65a0fc6df82848fd869a18743d8f36fc90eaef3592feb07f4

diff --git a/a/1.txt b/N3/1.txt
index 4ddbaee..2a64357 100644
--- a/a/1.txt
+++ b/N3/1.txt
@@ -1,4 +1,4 @@
-On Sun, Oct 01, 2017@09:42:03AM +0200, Christoph Hellwig wrote:
+On Sun, Oct 01, 2017 at 09:42:03AM +0200, Christoph Hellwig wrote:
 > This looks very convoluted, mostly because the existing code is
 > doing weird things.  For one thing what is sq_dma_addr currently
 > is not a DMA adddress - we either need the resource address
@@ -14,7 +14,7 @@ Yah, calling this a DMA address was a misnomer and confusing.
 
 > ---
 > From b78f4164881125c4fecfdb87878d0120b2177c53 Mon Sep 17 00:00:00 2001
-> From: Christoph Hellwig <hch at lst.de>
+> From: Christoph Hellwig <hch@lst.de>
 > Date: Sun, 1 Oct 2017 09:37:35 +0200
 > Subject: nvme-pci: Use PCI bus address for data/queues in CMB
 > 
@@ -31,10 +31,10 @@ Yah, calling this a DMA address was a misnomer and confusing.
 > Based on a report and previous patch from Abhishek Shah.
 > 
 > Fixes: 8ffaadf7 ("NVMe: Use CMB for the IO SQes if available")
-> Cc: stable at vger.kernel.org
-> Reported-by: Abhishek Shah <abhishek.shah at broadcom.com>
-> Signed-off-by: Christoph Hellwig <hch at lst.de>
+> Cc: stable@vger.kernel.org
+> Reported-by: Abhishek Shah <abhishek.shah@broadcom.com>
+> Signed-off-by: Christoph Hellwig <hch@lst.de>
 
 This looks good.
 
-Reviewed-by: Keith Busch <keith.busch at intel.com>
+Reviewed-by: Keith Busch <keith.busch@intel.com>
diff --git a/a/content_digest b/N3/content_digest
index 50c502c..6dd9ef7 100644
--- a/a/content_digest
+++ b/N3/content_digest
@@ -1,11 +1,21 @@
  "ref\01506763722-10687-1-git-send-email-abhishek.shah@broadcom.com\0"
  "ref\020171001074203.GA11115@lst.de\0"
- "From\0keith.busch@intel.com (Keith Busch)\0"
- "Subject\0[PATCH v2] nvme-pci: Use PCI bus address for data/queues in CMB\0"
+ "From\0Keith Busch <keith.busch@intel.com>\0"
+ "Subject\0Re: [PATCH v2] nvme-pci: Use PCI bus address for data/queues in CMB\0"
  "Date\0Mon, 2 Oct 2017 11:21:29 -0600\0"
+ "To\0Christoph Hellwig <hch@lst.de>\0"
+ "Cc\0Abhishek Shah <abhishek.shah@broadcom.com>"
+  Jens Axboe <axboe@fb.com>
+  Sagi Grimberg <sagi@grimberg.me>
+  linux-nvme@lists.infradead.org
+  linux-pci@vger.kernel.org
+  linux-arm-kernel@lists.infradead.org
+  linux-kernel@vger.kernel.org
+  bcm-kernel-feedback-list@broadcom.com
+ " stable@vger.kernel.org\0"
  "\00:1\0"
  "b\0"
- "On Sun, Oct 01, 2017@09:42:03AM +0200, Christoph Hellwig wrote:\n"
+ "On Sun, Oct 01, 2017 at 09:42:03AM +0200, Christoph Hellwig wrote:\n"
  "> This looks very convoluted, mostly because the existing code is\n"
  "> doing weird things.  For one thing what is sq_dma_addr currently\n"
  "> is not a DMA adddress - we either need the resource address\n"
@@ -21,7 +31,7 @@
  "\n"
  "> ---\n"
  "> From b78f4164881125c4fecfdb87878d0120b2177c53 Mon Sep 17 00:00:00 2001\n"
- "> From: Christoph Hellwig <hch at lst.de>\n"
+ "> From: Christoph Hellwig <hch@lst.de>\n"
  "> Date: Sun, 1 Oct 2017 09:37:35 +0200\n"
  "> Subject: nvme-pci: Use PCI bus address for data/queues in CMB\n"
  "> \n"
@@ -38,12 +48,12 @@
  "> Based on a report and previous patch from Abhishek Shah.\n"
  "> \n"
  "> Fixes: 8ffaadf7 (\"NVMe: Use CMB for the IO SQes if available\")\n"
- "> Cc: stable at vger.kernel.org\n"
- "> Reported-by: Abhishek Shah <abhishek.shah at broadcom.com>\n"
- "> Signed-off-by: Christoph Hellwig <hch at lst.de>\n"
+ "> Cc: stable@vger.kernel.org\n"
+ "> Reported-by: Abhishek Shah <abhishek.shah@broadcom.com>\n"
+ "> Signed-off-by: Christoph Hellwig <hch@lst.de>\n"
  "\n"
  "This looks good.\n"
  "\n"
- Reviewed-by: Keith Busch <keith.busch at intel.com>
+ Reviewed-by: Keith Busch <keith.busch@intel.com>
 
-093b52f07ac3488b3a11ac74ecb872cadfcacb04250f63a2e03025ff0107bd0b
+fe2fee6e681a5fffc9805117646f09e9d0664e9b04ec61148b8301586bf28f41

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