All of lore.kernel.org
 help / color / mirror / Atom feed
From: Peter De Schrijver <pdeschrijver@nvidia.com>
To: Bhumika Goyal <bhumirks@gmail.com>
Cc: <julia.lawall@lip6.fr>, <pgaikwad@nvidia.com>,
	<mturquette@baylibre.com>, <sboyd@codeaurora.org>,
	<thierry.reding@gmail.com>, <jonathanh@nvidia.com>,
	<linux-clk@vger.kernel.org>, <linux-tegra@vger.kernel.org>,
	<linux-kernel@vger.kernel.org>, <keescook@chromium.org>
Subject: Re: [PATCH] clk: tegra30: make tegra_clk_pll_params __ro_after_init
Date: Tue, 3 Oct 2017 11:32:31 +0300	[thread overview]
Message-ID: <20171003083231.GS6290@tbergstrom-lnx.Nvidia.com> (raw)
In-Reply-To: <1506975128-16514-1-git-send-email-bhumirks@gmail.com>

Acked-By: Peter De Schrijver <pdeschrijver@nvidia.com>

I would assume this also applies to many PLL structs for other Tegra SoCs?

Peter.

On Tue, Oct 03, 2017 at 01:42:08AM +0530, Bhumika Goyal wrote:
> These structures are only passed to the functions tegra_clk_register_pll,
> tegra_clk_register_pll{e/u} or tegra_periph_clk_init during the init
> phase. These functions modify the structures only during the init phase
> and after that the structures are never modified. Therefore, make them
> __ro_after_init.
> 
> Signed-off-by: Bhumika Goyal <bhumirks@gmail.com>
> ---
>  drivers/clk/tegra/clk-tegra30.c | 16 ++++++++--------
>  1 file changed, 8 insertions(+), 8 deletions(-)
> 
> diff --git a/drivers/clk/tegra/clk-tegra30.c b/drivers/clk/tegra/clk-tegra30.c
> index a2d163f..1ce7d76 100644
> --- a/drivers/clk/tegra/clk-tegra30.c
> +++ b/drivers/clk/tegra/clk-tegra30.c
> @@ -359,7 +359,7 @@
>  };
>  
>  /* PLL parameters */
> -static struct tegra_clk_pll_params pll_c_params = {
> +static struct tegra_clk_pll_params pll_c_params __ro_after_init = {
>  	.input_min = 2000000,
>  	.input_max = 31000000,
>  	.cf_min = 1000000,
> @@ -388,7 +388,7 @@
>  	.override_divp_shift = 15,
>  };
>  
> -static struct tegra_clk_pll_params pll_m_params = {
> +static struct tegra_clk_pll_params pll_m_params __ro_after_init = {
>  	.input_min = 2000000,
>  	.input_max = 31000000,
>  	.cf_min = 1000000,
> @@ -409,7 +409,7 @@
>  		 TEGRA_PLL_HAS_LOCK_ENABLE | TEGRA_PLL_FIXED,
>  };
>  
> -static struct tegra_clk_pll_params pll_p_params = {
> +static struct tegra_clk_pll_params pll_p_params __ro_after_init = {
>  	.input_min = 2000000,
>  	.input_max = 31000000,
>  	.cf_min = 1000000,
> @@ -444,7 +444,7 @@
>  		 TEGRA_PLL_HAS_LOCK_ENABLE,
>  };
>  
> -static struct tegra_clk_pll_params pll_d_params = {
> +static struct tegra_clk_pll_params pll_d_params __ro_after_init = {
>  	.input_min = 2000000,
>  	.input_max = 40000000,
>  	.cf_min = 1000000,
> @@ -461,7 +461,7 @@
>  		 TEGRA_PLL_USE_LOCK | TEGRA_PLL_HAS_LOCK_ENABLE,
>  };
>  
> -static struct tegra_clk_pll_params pll_d2_params = {
> +static struct tegra_clk_pll_params pll_d2_params __ro_after_init = {
>  	.input_min = 2000000,
>  	.input_max = 40000000,
>  	.cf_min = 1000000,
> @@ -478,7 +478,7 @@
>  		 TEGRA_PLL_USE_LOCK | TEGRA_PLL_HAS_LOCK_ENABLE,
>  };
>  
> -static struct tegra_clk_pll_params pll_u_params = {
> +static struct tegra_clk_pll_params pll_u_params __ro_after_init = {
>  	.input_min = 2000000,
>  	.input_max = 40000000,
>  	.cf_min = 1000000,
> @@ -496,7 +496,7 @@
>  		 TEGRA_PLL_HAS_LOCK_ENABLE,
>  };
>  
> -static struct tegra_clk_pll_params pll_x_params = {
> +static struct tegra_clk_pll_params pll_x_params __ro_after_init = {
>  	.input_min = 2000000,
>  	.input_max = 31000000,
>  	.cf_min = 1000000,
> @@ -513,7 +513,7 @@
>  		 TEGRA_PLL_USE_LOCK | TEGRA_PLL_HAS_LOCK_ENABLE,
>  };
>  
> -static struct tegra_clk_pll_params pll_e_params = {
> +static struct tegra_clk_pll_params pll_e_params __ro_after_init = {
>  	.input_min = 12000000,
>  	.input_max = 216000000,
>  	.cf_min = 12000000,
> -- 
> 1.9.1
> 
> --
> To unsubscribe from this list: send the line "unsubscribe linux-clk" in
> the body of a message to majordomo@vger.kernel.org
> More majordomo info at  http://vger.kernel.org/majordomo-info.html

WARNING: multiple messages have this Message-ID (diff)
From: Peter De Schrijver <pdeschrijver-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
To: Bhumika Goyal <bhumirks-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
Cc: julia.lawall-L2FTfq7BK8M@public.gmane.org,
	pgaikwad-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org,
	mturquette-rdvid1DuHRBWk0Htik3J/w@public.gmane.org,
	sboyd-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org,
	thierry.reding-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org,
	jonathanh-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org,
	linux-clk-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
	linux-tegra-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
	linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
	keescook-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org
Subject: Re: [PATCH] clk: tegra30: make tegra_clk_pll_params __ro_after_init
Date: Tue, 3 Oct 2017 11:32:31 +0300	[thread overview]
Message-ID: <20171003083231.GS6290@tbergstrom-lnx.Nvidia.com> (raw)
In-Reply-To: <1506975128-16514-1-git-send-email-bhumirks-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>

Acked-By: Peter De Schrijver <pdeschrijver-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>

I would assume this also applies to many PLL structs for other Tegra SoCs?

Peter.

On Tue, Oct 03, 2017 at 01:42:08AM +0530, Bhumika Goyal wrote:
> These structures are only passed to the functions tegra_clk_register_pll,
> tegra_clk_register_pll{e/u} or tegra_periph_clk_init during the init
> phase. These functions modify the structures only during the init phase
> and after that the structures are never modified. Therefore, make them
> __ro_after_init.
> 
> Signed-off-by: Bhumika Goyal <bhumirks-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
> ---
>  drivers/clk/tegra/clk-tegra30.c | 16 ++++++++--------
>  1 file changed, 8 insertions(+), 8 deletions(-)
> 
> diff --git a/drivers/clk/tegra/clk-tegra30.c b/drivers/clk/tegra/clk-tegra30.c
> index a2d163f..1ce7d76 100644
> --- a/drivers/clk/tegra/clk-tegra30.c
> +++ b/drivers/clk/tegra/clk-tegra30.c
> @@ -359,7 +359,7 @@
>  };
>  
>  /* PLL parameters */
> -static struct tegra_clk_pll_params pll_c_params = {
> +static struct tegra_clk_pll_params pll_c_params __ro_after_init = {
>  	.input_min = 2000000,
>  	.input_max = 31000000,
>  	.cf_min = 1000000,
> @@ -388,7 +388,7 @@
>  	.override_divp_shift = 15,
>  };
>  
> -static struct tegra_clk_pll_params pll_m_params = {
> +static struct tegra_clk_pll_params pll_m_params __ro_after_init = {
>  	.input_min = 2000000,
>  	.input_max = 31000000,
>  	.cf_min = 1000000,
> @@ -409,7 +409,7 @@
>  		 TEGRA_PLL_HAS_LOCK_ENABLE | TEGRA_PLL_FIXED,
>  };
>  
> -static struct tegra_clk_pll_params pll_p_params = {
> +static struct tegra_clk_pll_params pll_p_params __ro_after_init = {
>  	.input_min = 2000000,
>  	.input_max = 31000000,
>  	.cf_min = 1000000,
> @@ -444,7 +444,7 @@
>  		 TEGRA_PLL_HAS_LOCK_ENABLE,
>  };
>  
> -static struct tegra_clk_pll_params pll_d_params = {
> +static struct tegra_clk_pll_params pll_d_params __ro_after_init = {
>  	.input_min = 2000000,
>  	.input_max = 40000000,
>  	.cf_min = 1000000,
> @@ -461,7 +461,7 @@
>  		 TEGRA_PLL_USE_LOCK | TEGRA_PLL_HAS_LOCK_ENABLE,
>  };
>  
> -static struct tegra_clk_pll_params pll_d2_params = {
> +static struct tegra_clk_pll_params pll_d2_params __ro_after_init = {
>  	.input_min = 2000000,
>  	.input_max = 40000000,
>  	.cf_min = 1000000,
> @@ -478,7 +478,7 @@
>  		 TEGRA_PLL_USE_LOCK | TEGRA_PLL_HAS_LOCK_ENABLE,
>  };
>  
> -static struct tegra_clk_pll_params pll_u_params = {
> +static struct tegra_clk_pll_params pll_u_params __ro_after_init = {
>  	.input_min = 2000000,
>  	.input_max = 40000000,
>  	.cf_min = 1000000,
> @@ -496,7 +496,7 @@
>  		 TEGRA_PLL_HAS_LOCK_ENABLE,
>  };
>  
> -static struct tegra_clk_pll_params pll_x_params = {
> +static struct tegra_clk_pll_params pll_x_params __ro_after_init = {
>  	.input_min = 2000000,
>  	.input_max = 31000000,
>  	.cf_min = 1000000,
> @@ -513,7 +513,7 @@
>  		 TEGRA_PLL_USE_LOCK | TEGRA_PLL_HAS_LOCK_ENABLE,
>  };
>  
> -static struct tegra_clk_pll_params pll_e_params = {
> +static struct tegra_clk_pll_params pll_e_params __ro_after_init = {
>  	.input_min = 12000000,
>  	.input_max = 216000000,
>  	.cf_min = 12000000,
> -- 
> 1.9.1
> 
> --
> To unsubscribe from this list: send the line "unsubscribe linux-clk" in
> the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
> More majordomo info at  http://vger.kernel.org/majordomo-info.html

  reply	other threads:[~2017-10-03  8:32 UTC|newest]

Thread overview: 5+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-10-02 20:12 [PATCH] clk: tegra30: make tegra_clk_pll_params __ro_after_init Bhumika Goyal
2017-10-02 20:12 ` Bhumika Goyal
2017-10-03  8:32 ` Peter De Schrijver [this message]
2017-10-03  8:32   ` Peter De Schrijver
2017-10-17 11:12 ` Thierry Reding

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20171003083231.GS6290@tbergstrom-lnx.Nvidia.com \
    --to=pdeschrijver@nvidia.com \
    --cc=bhumirks@gmail.com \
    --cc=jonathanh@nvidia.com \
    --cc=julia.lawall@lip6.fr \
    --cc=keescook@chromium.org \
    --cc=linux-clk@vger.kernel.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=linux-tegra@vger.kernel.org \
    --cc=mturquette@baylibre.com \
    --cc=pgaikwad@nvidia.com \
    --cc=sboyd@codeaurora.org \
    --cc=thierry.reding@gmail.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.