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From: Manasi Navare <manasi.d.navare@intel.com>
To: Jani Nikula <jani.nikula@intel.com>
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH 2/3] drm/i915/dp: centralize max source rate conditions more
Date: Tue, 10 Oct 2017 11:35:28 -0700	[thread overview]
Message-ID: <20171010183528.GC30055@intel.com> (raw)
In-Reply-To: <20171009092959.29021-2-jani.nikula@intel.com>

On Mon, Oct 09, 2017 at 12:29:58PM +0300, Jani Nikula wrote:
> Turn intel_dp_source_supports_hbr2() into a simple helper to query the
> pre-filled source rates array, and move the conditions about which
> platforms support which rates to the single point of truth in
> intel_dp_set_source_rates().
> 
> This also reduces the code paths you have to think about in the source
> rates initialization in intel_dp_set_source_rates(), making it easier to
> grasp.
> 
> Cc: Manasi Navare <manasi.d.navare@intel.com>
> Signed-off-by: Jani Nikula <jani.nikula@intel.com>

Reviewed-by: Manasi Navare <manasi.d.navare@intel.com>

Manasi

> ---
>  drivers/gpu/drm/i915/intel_dp.c | 19 +++++++------------
>  1 file changed, 7 insertions(+), 12 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
> index ca48bce23a6f..09d75df497c0 100644
> --- a/drivers/gpu/drm/i915/intel_dp.c
> +++ b/drivers/gpu/drm/i915/intel_dp.c
> @@ -254,15 +254,15 @@ intel_dp_set_source_rates(struct intel_dp *intel_dp)
>  	} else if (IS_GEN9_BC(dev_priv)) {
>  		source_rates = skl_rates;
>  		size = ARRAY_SIZE(skl_rates);
> -	} else {
> +	} else if ((IS_HASWELL(dev_priv) && !IS_HSW_ULX(dev_priv)) ||
> +		   IS_BROADWELL(dev_priv)) {
>  		source_rates = default_rates;
>  		size = ARRAY_SIZE(default_rates);
> +	} else {
> +		source_rates = default_rates;
> +		size = ARRAY_SIZE(default_rates) - 1;
>  	}
>  
> -	/* This depends on the fact that 5.4 is last value in the array */
> -	if (!intel_dp_source_supports_hbr2(intel_dp))
> -		size--;
> -
>  	intel_dp->source_rates = source_rates;
>  	intel_dp->num_source_rates = size;
>  }
> @@ -1482,14 +1482,9 @@ intel_dp_aux_init(struct intel_dp *intel_dp)
>  
>  bool intel_dp_source_supports_hbr2(struct intel_dp *intel_dp)
>  {
> -	struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);
> -	struct drm_i915_private *dev_priv = to_i915(dig_port->base.base.dev);
> +	int max_rate = intel_dp->source_rates[intel_dp->num_source_rates - 1];
>  
> -	if ((IS_HASWELL(dev_priv) && !IS_HSW_ULX(dev_priv)) ||
> -	    IS_BROADWELL(dev_priv) || (INTEL_GEN(dev_priv) >= 9))
> -		return true;
> -	else
> -		return false;
> +	return max_rate >= 540000;
>  }
>  
>  static void
> -- 
> 2.11.0
> 
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  reply	other threads:[~2017-10-10 18:31 UTC|newest]

Thread overview: 13+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-10-09  9:29 [PATCH 1/3] drm/dp: WARN about invalid/unknown link rates and bw codes Jani Nikula
2017-10-09  9:29 ` [PATCH 2/3] drm/i915/dp: centralize max source rate conditions more Jani Nikula
2017-10-10 18:35   ` Manasi Navare [this message]
2017-10-09  9:29 ` [PATCH 3/3] drm/i915/dp: limit sink rates based on rate Jani Nikula
2017-10-10 18:38   ` Manasi Navare
2017-10-09 10:03 ` ✗ Fi.CI.BAT: warning for series starting with [1/3] drm/dp: WARN about invalid/unknown link rates and bw codes Patchwork
2017-10-09 10:32 ` [PATCH 1/3] " Thierry Reding
2017-10-11 16:03   ` Jani Nikula
2017-10-09 11:40 ` ✓ Fi.CI.BAT: success for series starting with [1/3] " Patchwork
2017-10-09 13:41 ` ✗ Fi.CI.IGT: failure " Patchwork
2017-10-11 19:11   ` Jani Nikula
2017-10-09 18:10 ` [PATCH 1/3] " Deucher, Alexander
2017-10-10 18:19 ` Manasi Navare

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