From mboxrd@z Thu Jan 1 00:00:00 1970 From: Lothar =?UTF-8?B?V2HDn21hbm4=?= Subject: Re: [PATCH 4/9] drm/panel: simple: add support for overriding the pixel clock polarity Date: Tue, 17 Oct 2017 08:51:12 +0200 Message-ID: <20171017085112.7bfb0b01@karo-electronics.de> References: <1507721021-28174-1-git-send-email-LW@KARO-electronics.de> <1507721021-28174-5-git-send-email-LW@KARO-electronics.de> Mime-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8BIT Return-path: In-Reply-To: Sender: devicetree-owner-u79uwXL29TY76Z2rM5mHXA@public.gmane.org To: Rob Herring Cc: David Airlie , Mark Rutland , Thierry Reding , "devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org" , dri-devel , "linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org" List-Id: devicetree@vger.kernel.org Hi, On Mon, 16 Oct 2017 17:13:29 -0500 Rob Herring wrote: > On Wed, Oct 11, 2017 at 6:23 AM, Lothar Waßmann wrote: > > The Ka-Ro electronics MB7 baseboard has an on-board LCD->LVDS > > converter that requires a fixed pixelclk polarity, no matter what the > > panel's display_mode specifies. Add an option to override the pixelclk > > polarity defined in the panel's display_mode via DTB. > > Wouldn't you know the polarity required based on the type of LVDS > converter chip in front of the panel? Or is that not being described > because it is "transparent". > Exactly the latter. Lothar Waßmann -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org More majordomo info at http://vger.kernel.org/majordomo-info.html From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1757097AbdJQGvW convert rfc822-to-8bit (ORCPT ); Tue, 17 Oct 2017 02:51:22 -0400 Received: from smtprelay06.ispgateway.de ([80.67.31.96]:60520 "EHLO smtprelay06.ispgateway.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1757047AbdJQGvS (ORCPT ); Tue, 17 Oct 2017 02:51:18 -0400 Date: Tue, 17 Oct 2017 08:51:12 +0200 From: Lothar =?UTF-8?B?V2HDn21hbm4=?= To: Rob Herring Cc: David Airlie , Mark Rutland , Thierry Reding , "devicetree@vger.kernel.org" , dri-devel , "linux-kernel@vger.kernel.org" Subject: Re: [PATCH 4/9] drm/panel: simple: add support for overriding the pixel clock polarity Message-ID: <20171017085112.7bfb0b01@karo-electronics.de> In-Reply-To: References: <1507721021-28174-1-git-send-email-LW@KARO-electronics.de> <1507721021-28174-5-git-send-email-LW@KARO-electronics.de> Organization: Ka-Ro electronics GmbH MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8BIT X-Df-Sender: bHdAa2Fyby1lbGVjdHJvbmljcy5kZQ== Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi, On Mon, 16 Oct 2017 17:13:29 -0500 Rob Herring wrote: > On Wed, Oct 11, 2017 at 6:23 AM, Lothar Waßmann wrote: > > The Ka-Ro electronics MB7 baseboard has an on-board LCD->LVDS > > converter that requires a fixed pixelclk polarity, no matter what the > > panel's display_mode specifies. Add an option to override the pixelclk > > polarity defined in the panel's display_mode via DTB. > > Wouldn't you know the polarity required based on the type of LVDS > converter chip in front of the panel? Or is that not being described > because it is "transparent". > Exactly the latter. Lothar Waßmann