From mboxrd@z Thu Jan 1 00:00:00 1970 Received: with ECARTIS (v1.0.0; list linux-mips); Wed, 18 Oct 2017 08:47:01 +0200 (CEST) Received: from bombadil.infradead.org ([65.50.211.133]:51884 "EHLO bombadil.infradead.org" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S23990498AbdJRGqyFQUFI (ORCPT ); Wed, 18 Oct 2017 08:46:54 +0200 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=infradead.org; s=bombadil.20170209; h=In-Reply-To:Content-Type:MIME-Version :References:Message-ID:Subject:Cc:To:From:Date:Sender:Reply-To: Content-Transfer-Encoding:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Id: List-Help:List-Unsubscribe:List-Subscribe:List-Post:List-Owner:List-Archive; bh=Ih3vSc/mVwF+EeLJFksZDMO55GFhDX3b+PntyVLQ+hA=; b=GLcLGZ2zobafeE1sQK5KIqrAn aT06/GF6AUPVeLPlf8T2isLtMyyuXl7eJMhEu2awGYCdhQzSjS9lvRRkYy+uvsXoRVrrVSCdkw0W8 IhfUgly5XzOSuoAtCwegAUREp9O4qYkEdkjEfAYK6ip69Pl5WlFAFzofECIVXI8N4nH2IonXP/5sn 4NUXz/O2ILj1UPEKjFcLMt5OHAhcSfmfqGF11OFoc8iz0tMGr5KtQbnm0kGKm9iod27S+Mlz7t9uN /1lVtRJ0Mj9noexZDdN81n0Wn2wnVm8tFixHcFnhyqk/gtUvWD8ai7IiWBGul7HgL2K1aCaflC0Fk r0VCXZY+Q==; Received: from hch by bombadil.infradead.org with local (Exim 4.87 #1 (Red Hat Linux)) id 1e4i7t-0006kd-41; Wed, 18 Oct 2017 06:46:49 +0000 Date: Tue, 17 Oct 2017 23:46:49 -0700 From: Christoph Hellwig To: Florian Fainelli Cc: Christoph Hellwig , Jim Quinlan , linux-kernel@vger.kernel.org, bcm-kernel-feedback-list@broadcom.com, linux-arm-kernel@lists.infradead.org, linux-mips@linux-mips.org, devicetree@vger.kernel.org, linux-pci@vger.kernel.org, Ralf Baechle , Catalin Marinas , Will Deacon , Bjorn Helgaas , Rob Herring , Mark Rutland , Gregory Fong , Kevin Cernekee , Brian Norris Subject: Re: [PATCH 1/9] SOC: brcmstb: add memory API Message-ID: <20171018064649.GA7734@infradead.org> References: <1507761269-7017-1-git-send-email-jim2101024@gmail.com> <1507761269-7017-2-git-send-email-jim2101024@gmail.com> <20171017082413.GA10574@infradead.org> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.8.3 (2017-05-23) X-SRS-Rewrite: SMTP reverse-path rewritten from by bombadil.infradead.org. See http://www.infradead.org/rpr.html Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 60440 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: hch@infradead.org Precedence: bulk List-help: List-unsubscribe: List-software: Ecartis version 1.0.0 List-Id: linux-mips X-List-ID: linux-mips List-subscribe: List-owner: List-post: List-archive: X-list: linux-mips On Tue, Oct 17, 2017 at 09:12:22AM -0700, Florian Fainelli wrote: > > Please move this into the arm arch code. > > No, this needs to work on both ARM and ARM64, hence the reason why this > is in a reasonably architecture neutral place. So there is no other shared code between the ARM and ARM64 ports for this SOC? > >> +EXPORT_SYMBOL(brcmstb_memory_phys_addr_to_memc); > > > >> +EXPORT_SYMBOL(brcmstb_memory_memc_size); > > > > Why is this exported? > > Because the PCIE RC driver can be built as a module. Hmm, supporting PCIE RC as module sounds odd, but it seems like there are a few others like that. At least make it EXPORT_SYMBOL_GPL() then to document the internal nature. From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Return-Path: Date: Tue, 17 Oct 2017 23:46:49 -0700 From: Christoph Hellwig To: Florian Fainelli Subject: Re: [PATCH 1/9] SOC: brcmstb: add memory API Message-ID: <20171018064649.GA7734@infradead.org> References: <1507761269-7017-1-git-send-email-jim2101024@gmail.com> <1507761269-7017-2-git-send-email-jim2101024@gmail.com> <20171017082413.GA10574@infradead.org> MIME-Version: 1.0 In-Reply-To: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Rutland , linux-mips@linux-mips.org, devicetree@vger.kernel.org, linux-pci@vger.kernel.org, Kevin Cernekee , Will Deacon , linux-kernel@vger.kernel.org, Ralf Baechle , Christoph Hellwig , Rob Herring , Jim Quinlan , bcm-kernel-feedback-list@broadcom.com, Gregory Fong , Catalin Marinas , Bjorn Helgaas , Brian Norris , linux-arm-kernel@lists.infradead.org Content-Type: text/plain; charset="us-ascii" Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+bjorn=helgaas.com@lists.infradead.org List-ID: On Tue, Oct 17, 2017 at 09:12:22AM -0700, Florian Fainelli wrote: > > Please move this into the arm arch code. > > No, this needs to work on both ARM and ARM64, hence the reason why this > is in a reasonably architecture neutral place. So there is no other shared code between the ARM and ARM64 ports for this SOC? > >> +EXPORT_SYMBOL(brcmstb_memory_phys_addr_to_memc); > > > >> +EXPORT_SYMBOL(brcmstb_memory_memc_size); > > > > Why is this exported? > > Because the PCIE RC driver can be built as a module. Hmm, supporting PCIE RC as module sounds odd, but it seems like there are a few others like that. At least make it EXPORT_SYMBOL_GPL() then to document the internal nature. _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel From mboxrd@z Thu Jan 1 00:00:00 1970 From: hch@infradead.org (Christoph Hellwig) Date: Tue, 17 Oct 2017 23:46:49 -0700 Subject: [PATCH 1/9] SOC: brcmstb: add memory API In-Reply-To: References: <1507761269-7017-1-git-send-email-jim2101024@gmail.com> <1507761269-7017-2-git-send-email-jim2101024@gmail.com> <20171017082413.GA10574@infradead.org> Message-ID: <20171018064649.GA7734@infradead.org> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org On Tue, Oct 17, 2017 at 09:12:22AM -0700, Florian Fainelli wrote: > > Please move this into the arm arch code. > > No, this needs to work on both ARM and ARM64, hence the reason why this > is in a reasonably architecture neutral place. So there is no other shared code between the ARM and ARM64 ports for this SOC? > >> +EXPORT_SYMBOL(brcmstb_memory_phys_addr_to_memc); > > > >> +EXPORT_SYMBOL(brcmstb_memory_memc_size); > > > > Why is this exported? > > Because the PCIE RC driver can be built as a module. Hmm, supporting PCIE RC as module sounds odd, but it seems like there are a few others like that. At least make it EXPORT_SYMBOL_GPL() then to document the internal nature.