All of lore.kernel.org
 help / color / mirror / Atom feed
From: Christoph Hellwig <hch-jcswGhMUV9g@public.gmane.org>
To: Jim Quinlan <jim2101024-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
Cc: Mark Rutland <mark.rutland-5wv7dgnIgG8@public.gmane.org>,
	linux-mips-6z/3iImG2C8G8FEW9MqTrA@public.gmane.org,
	Florian Fainelli
	<f.fainelli-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>,
	devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
	linux-pci <linux-pci-u79uwXL29TY76Z2rM5mHXA@public.gmane.org>,
	Kevin Cernekee <cernekee-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>,
	Will Deacon <will.deacon-5wv7dgnIgG8@public.gmane.org>,
	linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
	Ralf Baechle <ralf-6z/3iImG2C8G8FEW9MqTrA@public.gmane.org>,
	iommu-cunTk1MwBs9QetFLy7KEm3xJsTq8ys+cHZ5vskTnxNA@public.gmane.org,
	Rob Herring <robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>,
	bcm-kernel-feedback-list
	<bcm-kernel-feedback-list-dY08KVG/lbpWk0Htik3J/w@public.gmane.org>,
	Gregory Fong
	<gregory.0xf0-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>,
	Catalin Marinas <catalin.marinas-5wv7dgnIgG8@public.gmane.org>,
	Bjorn Helgaas <bhelgaas-hpIqsD4AKlfQT0dZR+AlfA@public.gmane.org>,
	Brian Norris
	<computersforpeace-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>,
	Christoph Hellwig <hch-jcswGhMUV9g@public.gmane.org>,
	linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org
Subject: Re: [PATCH 5/9] PCI: host: brcmstb: add dma-ranges for inbound traffic
Date: Wed, 18 Oct 2017 08:53:16 +0200	[thread overview]
Message-ID: <20171018065316.GA11183@lst.de> (raw)
In-Reply-To: <CANCKTBsCB+x2XgrND9AhRtxPkCXfps1nA+YymkZjKHOUZfjSHQ-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>

On Tue, Oct 17, 2017 at 12:11:55PM -0400, Jim Quinlan wrote:
> My understanding is that dma_pfn_offset is that it is a single
> constant offset from RAM, in our case, to map to PCIe space.

Yes.

> But in
> my commit message I detail how our PCIe controller presents memory
> with multiple regions with multiple different offsets. If an EP device
> maps to a region on the host memory, yes we can set the dma_pfn_offset
> for that device for that location within that range,.  But if the
> device then unmaps and allocates from another region with a different
> offset, it won't work.  If  I set dma_pfn_offset I have to assume that
> the device is using only one region of memory only, not more than one,
> and that it is not unmapping that region and mapping another (with a
> different offset).  Can I make those assumptions?

No, we can't make that assumption unfortunately.  But how is your
code going to work if the mapping spans multiple of your translation
regions?

Also I really don't think the stacking of dma_ops as in this patch
is a good idea.  For MIPS you should do the variant suggested in
the patch description and hook into dma_to_phys/phys_to_dma helpers,
and for ARM/ARM64 you should talk to the maintainers on how they
want the translation integrated.

WARNING: multiple messages have this Message-ID (diff)
From: Christoph Hellwig <hch@lst.de>
To: Jim Quinlan <jim2101024@gmail.com>
Cc: Christoph Hellwig <hch@lst.de>,
	Robin Murphy <robin.murphy@arm.com>,
	linux-kernel@vger.kernel.org, Mark Rutland <mark.rutland@arm.com>,
	linux-mips@linux-mips.org,
	Florian Fainelli <f.fainelli@gmail.com>,
	devicetree@vger.kernel.org, linux-pci <linux-pci@vger.kernel.org>,
	Kevin Cernekee <cernekee@gmail.com>,
	Will Deacon <will.deacon@arm.com>,
	Ralf Baechle <ralf@linux-mips.org>,
	Rob Herring <robh+dt@kernel.org>,
	bcm-kernel-feedback-list <bcm-kernel-feedback-list@broadcom.com>,
	Gregory Fong <gregory.0xf0@gmail.com>,
	Catalin Marinas <catalin.marinas@arm.com>,
	Bjorn Helgaas <bhelgaas@google.com>,
	Brian Norris <computersforpeace@gmail.com>,
	linux-arm-kernel@lists.infradead.org,
	Marek Szyprowski <m.szyprowski@samsung.com>,
	iommu@lists.linux-foundation.org
Subject: Re: [PATCH 5/9] PCI: host: brcmstb: add dma-ranges for inbound traffic
Date: Wed, 18 Oct 2017 08:53:16 +0200	[thread overview]
Message-ID: <20171018065316.GA11183@lst.de> (raw)
In-Reply-To: <CANCKTBsCB+x2XgrND9AhRtxPkCXfps1nA+YymkZjKHOUZfjSHQ@mail.gmail.com>

On Tue, Oct 17, 2017 at 12:11:55PM -0400, Jim Quinlan wrote:
> My understanding is that dma_pfn_offset is that it is a single
> constant offset from RAM, in our case, to map to PCIe space.

Yes.

> But in
> my commit message I detail how our PCIe controller presents memory
> with multiple regions with multiple different offsets. If an EP device
> maps to a region on the host memory, yes we can set the dma_pfn_offset
> for that device for that location within that range,.  But if the
> device then unmaps and allocates from another region with a different
> offset, it won't work.  If  I set dma_pfn_offset I have to assume that
> the device is using only one region of memory only, not more than one,
> and that it is not unmapping that region and mapping another (with a
> different offset).  Can I make those assumptions?

No, we can't make that assumption unfortunately.  But how is your
code going to work if the mapping spans multiple of your translation
regions?

Also I really don't think the stacking of dma_ops as in this patch
is a good idea.  For MIPS you should do the variant suggested in
the patch description and hook into dma_to_phys/phys_to_dma helpers,
and for ARM/ARM64 you should talk to the maintainers on how they
want the translation integrated.

WARNING: multiple messages have this Message-ID (diff)
From: Christoph Hellwig <hch@lst.de>
To: Jim Quinlan <jim2101024@gmail.com>
Cc: Mark Rutland <mark.rutland@arm.com>,
	linux-mips@linux-mips.org,
	Florian Fainelli <f.fainelli@gmail.com>,
	devicetree@vger.kernel.org, linux-pci <linux-pci@vger.kernel.org>,
	Kevin Cernekee <cernekee@gmail.com>,
	Will Deacon <will.deacon@arm.com>,
	linux-kernel@vger.kernel.org, Ralf Baechle <ralf@linux-mips.org>,
	iommu@lists.linux-foundation.org,
	Rob Herring <robh+dt@kernel.org>,
	bcm-kernel-feedback-list <bcm-kernel-feedback-list@broadcom.com>,
	Gregory Fong <gregory.0xf0@gmail.com>,
	Catalin Marinas <catalin.marinas@arm.com>,
	Bjorn Helgaas <bhelgaas@google.com>,
	Brian Norris <computersforpeace@gmail.com>,
	Robin Murphy <robin.murphy@arm.com>,
	Christoph Hellwig <hch@lst.de>,
	linux-arm-kernel@lists.infradead.org,
	Marek Szyprowski <m.szyprowski@samsung.com>
Subject: Re: [PATCH 5/9] PCI: host: brcmstb: add dma-ranges for inbound traffic
Date: Wed, 18 Oct 2017 08:53:16 +0200	[thread overview]
Message-ID: <20171018065316.GA11183@lst.de> (raw)
In-Reply-To: <CANCKTBsCB+x2XgrND9AhRtxPkCXfps1nA+YymkZjKHOUZfjSHQ@mail.gmail.com>

On Tue, Oct 17, 2017 at 12:11:55PM -0400, Jim Quinlan wrote:
> My understanding is that dma_pfn_offset is that it is a single
> constant offset from RAM, in our case, to map to PCIe space.

Yes.

> But in
> my commit message I detail how our PCIe controller presents memory
> with multiple regions with multiple different offsets. If an EP device
> maps to a region on the host memory, yes we can set the dma_pfn_offset
> for that device for that location within that range,.  But if the
> device then unmaps and allocates from another region with a different
> offset, it won't work.  If  I set dma_pfn_offset I have to assume that
> the device is using only one region of memory only, not more than one,
> and that it is not unmapping that region and mapping another (with a
> different offset).  Can I make those assumptions?

No, we can't make that assumption unfortunately.  But how is your
code going to work if the mapping spans multiple of your translation
regions?

Also I really don't think the stacking of dma_ops as in this patch
is a good idea.  For MIPS you should do the variant suggested in
the patch description and hook into dma_to_phys/phys_to_dma helpers,
and for ARM/ARM64 you should talk to the maintainers on how they
want the translation integrated.

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

WARNING: multiple messages have this Message-ID (diff)
From: hch@lst.de (Christoph Hellwig)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 5/9] PCI: host: brcmstb: add dma-ranges for inbound traffic
Date: Wed, 18 Oct 2017 08:53:16 +0200	[thread overview]
Message-ID: <20171018065316.GA11183@lst.de> (raw)
In-Reply-To: <CANCKTBsCB+x2XgrND9AhRtxPkCXfps1nA+YymkZjKHOUZfjSHQ@mail.gmail.com>

On Tue, Oct 17, 2017 at 12:11:55PM -0400, Jim Quinlan wrote:
> My understanding is that dma_pfn_offset is that it is a single
> constant offset from RAM, in our case, to map to PCIe space.

Yes.

> But in
> my commit message I detail how our PCIe controller presents memory
> with multiple regions with multiple different offsets. If an EP device
> maps to a region on the host memory, yes we can set the dma_pfn_offset
> for that device for that location within that range,.  But if the
> device then unmaps and allocates from another region with a different
> offset, it won't work.  If  I set dma_pfn_offset I have to assume that
> the device is using only one region of memory only, not more than one,
> and that it is not unmapping that region and mapping another (with a
> different offset).  Can I make those assumptions?

No, we can't make that assumption unfortunately.  But how is your
code going to work if the mapping spans multiple of your translation
regions?

Also I really don't think the stacking of dma_ops as in this patch
is a good idea.  For MIPS you should do the variant suggested in
the patch description and hook into dma_to_phys/phys_to_dma helpers,
and for ARM/ARM64 you should talk to the maintainers on how they
want the translation integrated.

  parent reply	other threads:[~2017-10-18  6:53 UTC|newest]

Thread overview: 138+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-10-11 22:34 PCI: brcmstb: Add Broadcom Settopbox PCIe support Jim Quinlan
2017-10-11 22:34 ` Jim Quinlan
2017-10-11 22:34 ` Jim Quinlan
2017-10-11 22:34 ` [PATCH 1/9] SOC: brcmstb: add memory API Jim Quinlan
2017-10-11 22:34   ` Jim Quinlan
2017-10-12 14:41   ` Julien Thierry
2017-10-12 14:41     ` Julien Thierry
2017-10-12 14:41     ` Julien Thierry
2017-10-12 16:53     ` Florian Fainelli
2017-10-12 16:53       ` Florian Fainelli
2017-10-12 16:53       ` Florian Fainelli
2017-10-17  8:24   ` Christoph Hellwig
2017-10-17  8:24     ` Christoph Hellwig
2017-10-17  8:24     ` Christoph Hellwig
2017-10-17 16:12     ` Florian Fainelli
2017-10-17 16:12       ` Florian Fainelli
2017-10-17 16:12       ` Florian Fainelli
2017-10-18  6:46       ` Christoph Hellwig
2017-10-18  6:46         ` Christoph Hellwig
2017-10-18  6:46         ` Christoph Hellwig
2017-10-18 16:47         ` Florian Fainelli
2017-10-18 16:47           ` Florian Fainelli
2017-10-11 22:34 ` [PATCH 2/9] PCI: host: brcmstb: add DT docs for Brcmstb PCIe device Jim Quinlan
2017-10-11 22:34   ` Jim Quinlan
2017-10-11 22:34   ` Jim Quinlan
2017-10-12  0:55   ` Brian Norris
2017-10-12  0:55     ` Brian Norris
2017-10-12  0:55     ` Brian Norris
2017-10-12  0:55     ` Brian Norris
2017-10-12 17:52     ` Jim Quinlan
2017-10-12 17:52       ` Jim Quinlan
2017-10-12 17:52       ` Jim Quinlan
2017-10-17 20:24   ` Rob Herring
2017-10-17 20:24     ` Rob Herring
2017-10-17 20:24     ` Rob Herring
2017-10-17 22:42     ` Jim Quinlan
2017-10-17 22:42       ` Jim Quinlan
2017-10-17 22:42       ` Jim Quinlan
2017-10-19 21:49       ` Rob Herring
2017-10-19 21:49         ` Rob Herring
2017-10-19 21:49         ` Rob Herring
2017-10-19 21:58         ` Florian Fainelli
2017-10-19 21:58           ` Florian Fainelli
2017-10-19 21:58           ` Florian Fainelli
2017-10-20 17:27           ` Brian Norris
2017-10-20 17:27             ` Brian Norris
2017-10-20 17:27             ` Brian Norris
2017-10-20 17:27             ` Brian Norris
2017-10-20 21:39             ` Rob Herring
2017-10-20 21:39               ` Rob Herring
2017-10-20 21:39               ` Rob Herring
2017-10-19 23:04         ` Jim Quinlan
2017-10-19 23:04           ` Jim Quinlan
2017-10-19 23:04           ` Jim Quinlan
2017-10-19 23:04           ` Jim Quinlan
2017-10-11 22:34 ` [PATCH 3/9] PCI: host: brcmstb: Broadcom PCIe Host Controller Jim Quinlan
2017-10-11 22:34   ` Jim Quinlan
2017-10-11 22:34   ` Jim Quinlan
2017-10-11 22:34   ` Jim Quinlan
2017-10-11 22:34 ` [PATCH 4/9] arm64: dma-mapping: export symbol arch_setup_dma_ops Jim Quinlan
2017-10-11 22:34   ` Jim Quinlan
2017-10-11 22:34   ` Jim Quinlan
2017-10-12 17:06   ` Robin Murphy
2017-10-12 17:06     ` Robin Murphy
2017-10-12 17:06     ` Robin Murphy
2017-10-12 18:15     ` Jim Quinlan
2017-10-12 18:15       ` Jim Quinlan
2017-10-12 18:15       ` Jim Quinlan
2017-10-12 18:15       ` Jim Quinlan
2017-10-11 22:34 ` [PATCH 5/9] PCI: host: brcmstb: add dma-ranges for inbound traffic Jim Quinlan
2017-10-11 22:34   ` Jim Quinlan
2017-10-11 22:34   ` Jim Quinlan
     [not found]   ` <1507761269-7017-6-git-send-email-jim2101024-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2017-10-12 18:04     ` Robin Murphy
2017-10-12 18:04       ` Robin Murphy
2017-10-12 18:04       ` Robin Murphy
2017-10-12 18:04       ` Robin Murphy
2017-10-12 21:43       ` Jim Quinlan
2017-10-12 21:43         ` Jim Quinlan
2017-10-12 21:43         ` Jim Quinlan
2017-10-17  8:14       ` Christoph Hellwig
2017-10-17  8:14         ` Christoph Hellwig
2017-10-17  8:14         ` Christoph Hellwig
2017-10-17 16:11         ` Jim Quinlan
2017-10-17 16:11           ` Jim Quinlan
2017-10-17 16:11           ` Jim Quinlan
     [not found]           ` <CANCKTBsCB+x2XgrND9AhRtxPkCXfps1nA+YymkZjKHOUZfjSHQ-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2017-10-18  6:53             ` Christoph Hellwig [this message]
2017-10-18  6:53               ` Christoph Hellwig
2017-10-18  6:53               ` Christoph Hellwig
2017-10-18  6:53               ` Christoph Hellwig
     [not found]               ` <20171018065316.GA11183-jcswGhMUV9g@public.gmane.org>
2017-10-18 14:41                 ` Jim Quinlan
2017-10-18 14:41                   ` Jim Quinlan
2017-10-18 14:41                   ` Jim Quinlan
     [not found]                   ` <CANCKTBv+yiCNsrnx3m+W9wPqC4NdKPZ2p=zLtSa8fX6v1rPcYQ-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2017-10-19  9:16                     ` Christoph Hellwig
2017-10-19  9:16                       ` Christoph Hellwig
2017-10-19  9:16                       ` Christoph Hellwig
2017-10-19  9:16                       ` Christoph Hellwig
2017-10-19 22:47                       ` Jim Quinlan
2017-10-19 22:47                         ` Jim Quinlan
2017-10-19 22:47                         ` Jim Quinlan
     [not found]                         ` <CANCKTBuaTD29My77QfOeUmtZfLAmmJXUYe6QvBW+uoH2Kb+tAQ-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2017-10-20  7:37                           ` Christoph Hellwig
2017-10-20  7:37                             ` Christoph Hellwig
2017-10-20  7:37                             ` Christoph Hellwig
2017-10-20  7:37                             ` Christoph Hellwig
     [not found]                             ` <20171020073730.GA12937-jcswGhMUV9g@public.gmane.org>
2017-10-20 14:41                               ` Jim Quinlan
2017-10-20 14:41                                 ` Jim Quinlan
2017-10-20 14:41                                 ` Jim Quinlan
2017-10-20 14:41                                 ` Jim Quinlan
2017-10-20 14:57                                 ` Christoph Hellwig
2017-10-20 14:57                                   ` Christoph Hellwig
2017-10-20 14:57                                   ` Christoph Hellwig
2017-10-20 14:57                                   ` Christoph Hellwig
2017-10-20 15:27                                   ` Jim Quinlan
2017-10-20 15:27                                     ` Jim Quinlan
2017-10-20 15:27                                     ` Jim Quinlan
2017-10-20 16:17                                     ` Christoph Hellwig
2017-10-20 16:17                                       ` Christoph Hellwig
2017-10-20 16:17                                       ` Christoph Hellwig
2017-10-20 16:17                                       ` Christoph Hellwig
     [not found]                                     ` <CANCKTBtxp9gSdndKAZ7xGA+VozQsn2PX_-9P8A22_5Matbb7-w-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2017-10-23  9:06                                       ` David Laight
2017-10-23  9:06                                         ` David Laight
2017-10-23  9:06                                         ` David Laight
2017-10-23  9:06                                         ` David Laight
     [not found]                                         ` <063D6719AE5E284EB5DD2968C1650D6DD009F05A-VkEWCZq2GCInGFn1LkZF6NBPR1lH4CV8@public.gmane.org>
2017-10-24 18:08                                           ` Jim Quinlan
2017-10-24 18:08                                             ` Jim Quinlan
2017-10-24 18:08                                             ` Jim Quinlan
2017-10-24 18:08                                             ` Jim Quinlan
2017-10-25  9:36                                             ` David Laight
2017-10-25  9:36                                               ` David Laight
2017-10-25  9:36                                               ` David Laight
2017-10-25  9:36                                               ` David Laight
2017-10-11 22:34 ` [PATCH 6/9] PCI/MSI: Enable PCI_MSI_IRQ_DOMAIN support for MIPS Jim Quinlan
2017-10-11 22:34   ` Jim Quinlan
2017-10-11 22:34 ` [PATCH 7/9] PCI: host: brcmstb: add MSI capability Jim Quinlan
2017-10-11 22:34   ` Jim Quinlan
2017-10-11 22:34 ` [PATCH 8/9] MIPS: BMIPS: add PCI bindings for 7425, 7435 Jim Quinlan
2017-10-11 22:34   ` Jim Quinlan
2017-10-11 22:34 ` [PATCH 9/9] MIPS: BMIPS: enable PCI Jim Quinlan
2017-10-11 22:34   ` Jim Quinlan

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20171018065316.GA11183@lst.de \
    --to=hch-jcswghmuv9g@public.gmane.org \
    --cc=bcm-kernel-feedback-list-dY08KVG/lbpWk0Htik3J/w@public.gmane.org \
    --cc=bhelgaas-hpIqsD4AKlfQT0dZR+AlfA@public.gmane.org \
    --cc=catalin.marinas-5wv7dgnIgG8@public.gmane.org \
    --cc=cernekee-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org \
    --cc=computersforpeace-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org \
    --cc=devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org \
    --cc=f.fainelli-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org \
    --cc=gregory.0xf0-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org \
    --cc=iommu-cunTk1MwBs9QetFLy7KEm3xJsTq8ys+cHZ5vskTnxNA@public.gmane.org \
    --cc=jim2101024-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org \
    --cc=linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org \
    --cc=linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org \
    --cc=linux-mips-6z/3iImG2C8G8FEW9MqTrA@public.gmane.org \
    --cc=linux-pci-u79uwXL29TY76Z2rM5mHXA@public.gmane.org \
    --cc=mark.rutland-5wv7dgnIgG8@public.gmane.org \
    --cc=ralf-6z/3iImG2C8G8FEW9MqTrA@public.gmane.org \
    --cc=robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org \
    --cc=will.deacon-5wv7dgnIgG8@public.gmane.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.