From mboxrd@z Thu Jan 1 00:00:00 1970 From: Boris Brezillon Subject: Re: [RFC 06/12] mtd: nand: add reworked Marvell NAND controller driver Date: Thu, 19 Oct 2017 09:18:10 +0200 Message-ID: <20171019091810.13f54c78@bbrezillon> References: <20171018143629.29302-1-miquel.raynal@free-electrons.com> <20171018143629.29302-7-miquel.raynal@free-electrons.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: In-Reply-To: <20171018143629.29302-7-miquel.raynal@free-electrons.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: driverdev-devel-bounces@linuxdriverproject.org Sender: "devel" To: Miquel Raynal Cc: Mark Rutland , Andrew Lunn , Catalin Marinas , Hanna Hawa , Will Deacon , Stefan Agner , Nadav Haklai , Masahiro Yamada , linux-mtd@lists.infradead.org, Matthias Brugger , Robert Jarzmik , devel@driverdev.osuosl.org, Maxim Levitsky , Kamal Dasu , Josh Wu , Russell King , Marek Vasut , Chen-Yu Tsai , bcm-kernel-feedback-list@broadcom.com, Sebastian Hesselbarth , Ezequiel Garcia , Sylvain Lemieux , Marc Gonzalez List-Id: linux-mediatek@lists.infradead.org On Wed, 18 Oct 2017 16:36:23 +0200 Miquel Raynal wrote: > + > +enum marvell_nfc_variant { > + MARVELL_NFC_VARIANT_PXA3XX, > + MARVELL_NFC_VARIANT_ARMADA370, > + MARVELL_NFC_VARIANT_ARMADA_8K, > +}; > + > +/* > + * NAND controller capabilities for distinction between compatible strings > + * > + * @variant: Board type > + * @max_cs_nb: Number of Chip Select lines available > + * @max_rb_nb: Number of Ready/Busy lines available > + * @legacy_of_bindings Indicates if DT parsing must be done using the old > + * fashion way > + */ > +struct marvell_nfc_caps { > + enum marvell_nfc_variant variant; Do you really need this variant field. It seems you're only using it to detect if you should MUX the NAND pins using the Special Function registers on armada8k. Maybe you should just have: bool need_system_controller; and set it to true for the "armada8k" compatible. > + unsigned int max_cs_nb; > + unsigned int max_rb_nb; > + bool legacy_of_bindings; > +}; > + From mboxrd@z Thu Jan 1 00:00:00 1970 Date: Thu, 19 Oct 2017 09:18:10 +0200 From: Boris Brezillon To: Miquel Raynal Cc: Andrew Lunn , bcm-kernel-feedback-list@broadcom.com, Brian Norris , Catalin Marinas , Chen-Yu Tsai , Cyrille Pitchen , Daniel Mack , David Woodhouse , devel@driverdev.osuosl.org, devicetree@vger.kernel.org, Ezequiel Garcia , Greg Kroah-Hartman , Gregory Clement , Han Xu , Haojian Zhuang , Jason Cooper , Josh Wu , Kamal Dasu , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-mediatek@lists.infradead.org, linux-mtd@lists.infradead.org, Marc Gonzalez , Marek Vasut , Mark Rutland , Masahiro Yamada , Matthias Brugger , Maxime Ripard , Maxim Levitsky , Richard Weinberger , Robert Jarzmik , Rob Herring , Russell King , Sebastian Hesselbarth , Stefan Agner , Sylvain Lemieux , Vladimir Zapolskiy , Wenyou Yang , Will Deacon , Thomas Petazzoni , Antoine Tenart , Igor Grinberg , Nadav Haklai , Ofer Heifetz , Neta Zur Hershkovits , Hanna Hawa Subject: Re: [RFC 06/12] mtd: nand: add reworked Marvell NAND controller driver Message-ID: <20171019091810.13f54c78@bbrezillon> In-Reply-To: <20171018143629.29302-7-miquel.raynal@free-electrons.com> References: <20171018143629.29302-1-miquel.raynal@free-electrons.com> <20171018143629.29302-7-miquel.raynal@free-electrons.com> MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit List-Id: Linux MTD discussion mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , On Wed, 18 Oct 2017 16:36:23 +0200 Miquel Raynal wrote: > + > +enum marvell_nfc_variant { > + MARVELL_NFC_VARIANT_PXA3XX, > + MARVELL_NFC_VARIANT_ARMADA370, > + MARVELL_NFC_VARIANT_ARMADA_8K, > +}; > + > +/* > + * NAND controller capabilities for distinction between compatible strings > + * > + * @variant: Board type > + * @max_cs_nb: Number of Chip Select lines available > + * @max_rb_nb: Number of Ready/Busy lines available > + * @legacy_of_bindings Indicates if DT parsing must be done using the old > + * fashion way > + */ > +struct marvell_nfc_caps { > + enum marvell_nfc_variant variant; Do you really need this variant field. It seems you're only using it to detect if you should MUX the NAND pins using the Special Function registers on armada8k. Maybe you should just have: bool need_system_controller; and set it to true for the "armada8k" compatible. > + unsigned int max_cs_nb; > + unsigned int max_rb_nb; > + bool legacy_of_bindings; > +}; > + From mboxrd@z Thu Jan 1 00:00:00 1970 From: boris.brezillon@free-electrons.com (Boris Brezillon) Date: Thu, 19 Oct 2017 09:18:10 +0200 Subject: [RFC 06/12] mtd: nand: add reworked Marvell NAND controller driver In-Reply-To: <20171018143629.29302-7-miquel.raynal@free-electrons.com> References: <20171018143629.29302-1-miquel.raynal@free-electrons.com> <20171018143629.29302-7-miquel.raynal@free-electrons.com> Message-ID: <20171019091810.13f54c78@bbrezillon> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org On Wed, 18 Oct 2017 16:36:23 +0200 Miquel Raynal wrote: > + > +enum marvell_nfc_variant { > + MARVELL_NFC_VARIANT_PXA3XX, > + MARVELL_NFC_VARIANT_ARMADA370, > + MARVELL_NFC_VARIANT_ARMADA_8K, > +}; > + > +/* > + * NAND controller capabilities for distinction between compatible strings > + * > + * @variant: Board type > + * @max_cs_nb: Number of Chip Select lines available > + * @max_rb_nb: Number of Ready/Busy lines available > + * @legacy_of_bindings Indicates if DT parsing must be done using the old > + * fashion way > + */ > +struct marvell_nfc_caps { > + enum marvell_nfc_variant variant; Do you really need this variant field. It seems you're only using it to detect if you should MUX the NAND pins using the Special Function registers on armada8k. Maybe you should just have: bool need_system_controller; and set it to true for the "armada8k" compatible. > + unsigned int max_cs_nb; > + unsigned int max_rb_nb; > + bool legacy_of_bindings; > +}; > +