From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751900AbdJTNgb (ORCPT ); Fri, 20 Oct 2017 09:36:31 -0400 Received: from mail.linuxfoundation.org ([140.211.169.12]:33626 "EHLO mail.linuxfoundation.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750936AbdJTNga (ORCPT ); Fri, 20 Oct 2017 09:36:30 -0400 Date: Fri, 20 Oct 2017 15:36:37 +0200 From: Greg KH To: srinivas.kandagatla@linaro.org Cc: linux-kernel@vger.kernel.org, Icenowy Zheng Subject: Re: [PATCH 06/12] nvmem: sunxi-sid: add support for A64/H5's SID controller Message-ID: <20171020133637.GE9301@kroah.com> References: <20171009132641.27169-1-srinivas.kandagatla@linaro.org> <20171009132641.27169-7-srinivas.kandagatla@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20171009132641.27169-7-srinivas.kandagatla@linaro.org> User-Agent: Mutt/1.9.1 (2017-09-22) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Mon, Oct 09, 2017 at 03:26:35PM +0200, srinivas.kandagatla@linaro.org wrote: > From: Icenowy Zheng > > Allwinner A64/H5 SoCs come with a SID controller like the one in H3, but > without the silicon bug that makes the initial value at 0x200 wrong, so > the value at 0x200 can be directly read. > > Add support for this kind of SID controller. > > Signed-off-by: Icenowy Zheng > Signed-off-by: Srinivas Kandagatla > --- > Documentation/devicetree/bindings/nvmem/allwinner,sunxi-sid.txt | 1 + > drivers/nvmem/sunxi_sid.c | 6 ++++++ > 2 files changed, 7 insertions(+) I need a DT maintainer's ack for this, right? thanks, greg k-h