From: Christoph Hellwig <hch@lst.de>
To: Jim Quinlan <jim2101024@gmail.com>
Cc: Christoph Hellwig <hch@lst.de>,
Robin Murphy <robin.murphy@arm.com>,
linux-kernel@vger.kernel.org, Mark Rutland <mark.rutland@arm.com>,
Linux-MIPS <linux-mips@linux-mips.org>,
Florian Fainelli <f.fainelli@gmail.com>,
devicetree@vger.kernel.org, linux-pci <linux-pci@vger.kernel.org>,
Kevin Cernekee <cernekee@gmail.com>,
Will Deacon <will.deacon@arm.com>,
Ralf Baechle <ralf@linux-mips.org>,
Rob Herring <robh+dt@kernel.org>,
bcm-kernel-feedback-list <bcm-kernel-feedback-list@broadcom.com>,
Gregory Fong <gregory.0xf0@gmail.com>,
Catalin Marinas <catalin.marinas@arm.com>,
Bjorn Helgaas <bhelgaas@google.com>,
Brian Norris <computersforpeace@gmail.com>,
linux-arm-kernel@lists.infradead.org,
Marek Szyprowski <m.szyprowski@samsung.com>,
iommu@lists.linux-foun
Subject: Re: [PATCH 5/9] PCI: host: brcmstb: add dma-ranges for inbound traffic
Date: Fri, 20 Oct 2017 16:57:52 +0200 [thread overview]
Message-ID: <20171020145752.GA4694@lst.de> (raw)
In-Reply-To: <CANCKTBsRRkwNMrxWjtgxbyZqT6NOxPX0NHDbnEO2BMjj8oVtpg@mail.gmail.com>
On Fri, Oct 20, 2017 at 10:41:56AM -0400, Jim Quinlan wrote:
> I am not sure I understand your comment -- the size of the request
> shouldn't be a factor. Let's look at your example of the DMA request
> of 3fffff00 to 4000000f (physical memory). Lets say it is for 15
> pages. If we block out the last page [0x3ffff000..0x3fffffff] from
> what is available, there is no 15 page span that can happen across the
> 0x40000000 boundary. For SG, there can be no merge that connects a
> page from one region to another region. Can you give an example of
> the scenario you are thinking of?
What prevents a merge from say the regions of
0....3fffffff and 40000000....7fffffff?
WARNING: multiple messages have this Message-ID (diff)
From: Christoph Hellwig <hch@lst.de>
To: Jim Quinlan <jim2101024@gmail.com>
Cc: Christoph Hellwig <hch@lst.de>,
Robin Murphy <robin.murphy@arm.com>,
linux-kernel@vger.kernel.org, Mark Rutland <mark.rutland@arm.com>,
Linux-MIPS <linux-mips@linux-mips.org>,
Florian Fainelli <f.fainelli@gmail.com>,
devicetree@vger.kernel.org, linux-pci <linux-pci@vger.kernel.org>,
Kevin Cernekee <cernekee@gmail.com>,
Will Deacon <will.deacon@arm.com>,
Ralf Baechle <ralf@linux-mips.org>,
Rob Herring <robh+dt@kernel.org>,
bcm-kernel-feedback-list <bcm-kernel-feedback-list@broadcom.com>,
Gregory Fong <gregory.0xf0@gmail.com>,
Catalin Marinas <catalin.marinas@arm.com>,
Bjorn Helgaas <bhelgaas@google.com>,
Brian Norris <computersforpeace@gmail.com>,
linux-arm-kernel@lists.infradead.org,
Marek Szyprowski <m.szyprowski@samsung.com>,
iommu@lists.linux-foundation.org
Subject: Re: [PATCH 5/9] PCI: host: brcmstb: add dma-ranges for inbound traffic
Date: Fri, 20 Oct 2017 16:57:52 +0200 [thread overview]
Message-ID: <20171020145752.GA4694@lst.de> (raw)
In-Reply-To: <CANCKTBsRRkwNMrxWjtgxbyZqT6NOxPX0NHDbnEO2BMjj8oVtpg@mail.gmail.com>
On Fri, Oct 20, 2017 at 10:41:56AM -0400, Jim Quinlan wrote:
> I am not sure I understand your comment -- the size of the request
> shouldn't be a factor. Let's look at your example of the DMA request
> of 3fffff00 to 4000000f (physical memory). Lets say it is for 15
> pages. If we block out the last page [0x3ffff000..0x3fffffff] from
> what is available, there is no 15 page span that can happen across the
> 0x40000000 boundary. For SG, there can be no merge that connects a
> page from one region to another region. Can you give an example of
> the scenario you are thinking of?
What prevents a merge from say the regions of
0....3fffffff and 40000000....7fffffff?
WARNING: multiple messages have this Message-ID (diff)
From: Christoph Hellwig <hch@lst.de>
To: Jim Quinlan <jim2101024@gmail.com>
Cc: Mark Rutland <mark.rutland@arm.com>,
Linux-MIPS <linux-mips@linux-mips.org>,
Florian Fainelli <f.fainelli@gmail.com>,
devicetree@vger.kernel.org, linux-pci <linux-pci@vger.kernel.org>,
Kevin Cernekee <cernekee@gmail.com>,
Will Deacon <will.deacon@arm.com>,
linux-kernel@vger.kernel.org, Ralf Baechle <ralf@linux-mips.org>,
iommu@lists.linux-foundation.org,
Rob Herring <robh+dt@kernel.org>,
bcm-kernel-feedback-list <bcm-kernel-feedback-list@broadcom.com>,
Gregory Fong <gregory.0xf0@gmail.com>,
Catalin Marinas <catalin.marinas@arm.com>,
Bjorn Helgaas <bhelgaas@google.com>,
Brian Norris <computersforpeace@gmail.com>,
Robin Murphy <robin.murphy@arm.com>,
Christoph Hellwig <hch@lst.de>,
linux-arm-kernel@lists.infradead.org,
Marek Szyprowski <m.szyprowski@samsung.com>
Subject: Re: [PATCH 5/9] PCI: host: brcmstb: add dma-ranges for inbound traffic
Date: Fri, 20 Oct 2017 16:57:52 +0200 [thread overview]
Message-ID: <20171020145752.GA4694@lst.de> (raw)
In-Reply-To: <CANCKTBsRRkwNMrxWjtgxbyZqT6NOxPX0NHDbnEO2BMjj8oVtpg@mail.gmail.com>
On Fri, Oct 20, 2017 at 10:41:56AM -0400, Jim Quinlan wrote:
> I am not sure I understand your comment -- the size of the request
> shouldn't be a factor. Let's look at your example of the DMA request
> of 3fffff00 to 4000000f (physical memory). Lets say it is for 15
> pages. If we block out the last page [0x3ffff000..0x3fffffff] from
> what is available, there is no 15 page span that can happen across the
> 0x40000000 boundary. For SG, there can be no merge that connects a
> page from one region to another region. Can you give an example of
> the scenario you are thinking of?
What prevents a merge from say the regions of
0....3fffffff and 40000000....7fffffff?
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
WARNING: multiple messages have this Message-ID (diff)
From: hch@lst.de (Christoph Hellwig)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 5/9] PCI: host: brcmstb: add dma-ranges for inbound traffic
Date: Fri, 20 Oct 2017 16:57:52 +0200 [thread overview]
Message-ID: <20171020145752.GA4694@lst.de> (raw)
In-Reply-To: <CANCKTBsRRkwNMrxWjtgxbyZqT6NOxPX0NHDbnEO2BMjj8oVtpg@mail.gmail.com>
On Fri, Oct 20, 2017 at 10:41:56AM -0400, Jim Quinlan wrote:
> I am not sure I understand your comment -- the size of the request
> shouldn't be a factor. Let's look at your example of the DMA request
> of 3fffff00 to 4000000f (physical memory). Lets say it is for 15
> pages. If we block out the last page [0x3ffff000..0x3fffffff] from
> what is available, there is no 15 page span that can happen across the
> 0x40000000 boundary. For SG, there can be no merge that connects a
> page from one region to another region. Can you give an example of
> the scenario you are thinking of?
What prevents a merge from say the regions of
0....3fffffff and 40000000....7fffffff?
next prev parent reply other threads:[~2017-10-20 14:57 UTC|newest]
Thread overview: 138+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-10-11 22:34 PCI: brcmstb: Add Broadcom Settopbox PCIe support Jim Quinlan
2017-10-11 22:34 ` Jim Quinlan
2017-10-11 22:34 ` Jim Quinlan
2017-10-11 22:34 ` [PATCH 1/9] SOC: brcmstb: add memory API Jim Quinlan
2017-10-11 22:34 ` Jim Quinlan
2017-10-12 14:41 ` Julien Thierry
2017-10-12 14:41 ` Julien Thierry
2017-10-12 14:41 ` Julien Thierry
2017-10-12 16:53 ` Florian Fainelli
2017-10-12 16:53 ` Florian Fainelli
2017-10-12 16:53 ` Florian Fainelli
2017-10-17 8:24 ` Christoph Hellwig
2017-10-17 8:24 ` Christoph Hellwig
2017-10-17 8:24 ` Christoph Hellwig
2017-10-17 16:12 ` Florian Fainelli
2017-10-17 16:12 ` Florian Fainelli
2017-10-17 16:12 ` Florian Fainelli
2017-10-18 6:46 ` Christoph Hellwig
2017-10-18 6:46 ` Christoph Hellwig
2017-10-18 6:46 ` Christoph Hellwig
2017-10-18 16:47 ` Florian Fainelli
2017-10-18 16:47 ` Florian Fainelli
2017-10-11 22:34 ` [PATCH 2/9] PCI: host: brcmstb: add DT docs for Brcmstb PCIe device Jim Quinlan
2017-10-11 22:34 ` Jim Quinlan
2017-10-11 22:34 ` Jim Quinlan
2017-10-12 0:55 ` Brian Norris
2017-10-12 0:55 ` Brian Norris
2017-10-12 0:55 ` Brian Norris
2017-10-12 0:55 ` Brian Norris
2017-10-12 17:52 ` Jim Quinlan
2017-10-12 17:52 ` Jim Quinlan
2017-10-12 17:52 ` Jim Quinlan
2017-10-17 20:24 ` Rob Herring
2017-10-17 20:24 ` Rob Herring
2017-10-17 20:24 ` Rob Herring
2017-10-17 22:42 ` Jim Quinlan
2017-10-17 22:42 ` Jim Quinlan
2017-10-17 22:42 ` Jim Quinlan
2017-10-19 21:49 ` Rob Herring
2017-10-19 21:49 ` Rob Herring
2017-10-19 21:49 ` Rob Herring
2017-10-19 21:58 ` Florian Fainelli
2017-10-19 21:58 ` Florian Fainelli
2017-10-19 21:58 ` Florian Fainelli
2017-10-20 17:27 ` Brian Norris
2017-10-20 17:27 ` Brian Norris
2017-10-20 17:27 ` Brian Norris
2017-10-20 17:27 ` Brian Norris
2017-10-20 21:39 ` Rob Herring
2017-10-20 21:39 ` Rob Herring
2017-10-20 21:39 ` Rob Herring
2017-10-19 23:04 ` Jim Quinlan
2017-10-19 23:04 ` Jim Quinlan
2017-10-19 23:04 ` Jim Quinlan
2017-10-19 23:04 ` Jim Quinlan
2017-10-11 22:34 ` [PATCH 3/9] PCI: host: brcmstb: Broadcom PCIe Host Controller Jim Quinlan
2017-10-11 22:34 ` Jim Quinlan
2017-10-11 22:34 ` Jim Quinlan
2017-10-11 22:34 ` Jim Quinlan
2017-10-11 22:34 ` [PATCH 4/9] arm64: dma-mapping: export symbol arch_setup_dma_ops Jim Quinlan
2017-10-11 22:34 ` Jim Quinlan
2017-10-11 22:34 ` Jim Quinlan
2017-10-12 17:06 ` Robin Murphy
2017-10-12 17:06 ` Robin Murphy
2017-10-12 17:06 ` Robin Murphy
2017-10-12 18:15 ` Jim Quinlan
2017-10-12 18:15 ` Jim Quinlan
2017-10-12 18:15 ` Jim Quinlan
2017-10-12 18:15 ` Jim Quinlan
2017-10-11 22:34 ` [PATCH 5/9] PCI: host: brcmstb: add dma-ranges for inbound traffic Jim Quinlan
2017-10-11 22:34 ` Jim Quinlan
2017-10-11 22:34 ` Jim Quinlan
[not found] ` <1507761269-7017-6-git-send-email-jim2101024-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2017-10-12 18:04 ` Robin Murphy
2017-10-12 18:04 ` Robin Murphy
2017-10-12 18:04 ` Robin Murphy
2017-10-12 18:04 ` Robin Murphy
2017-10-12 21:43 ` Jim Quinlan
2017-10-12 21:43 ` Jim Quinlan
2017-10-12 21:43 ` Jim Quinlan
2017-10-17 8:14 ` Christoph Hellwig
2017-10-17 8:14 ` Christoph Hellwig
2017-10-17 8:14 ` Christoph Hellwig
2017-10-17 16:11 ` Jim Quinlan
2017-10-17 16:11 ` Jim Quinlan
2017-10-17 16:11 ` Jim Quinlan
[not found] ` <CANCKTBsCB+x2XgrND9AhRtxPkCXfps1nA+YymkZjKHOUZfjSHQ-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2017-10-18 6:53 ` Christoph Hellwig
2017-10-18 6:53 ` Christoph Hellwig
2017-10-18 6:53 ` Christoph Hellwig
2017-10-18 6:53 ` Christoph Hellwig
[not found] ` <20171018065316.GA11183-jcswGhMUV9g@public.gmane.org>
2017-10-18 14:41 ` Jim Quinlan
2017-10-18 14:41 ` Jim Quinlan
2017-10-18 14:41 ` Jim Quinlan
[not found] ` <CANCKTBv+yiCNsrnx3m+W9wPqC4NdKPZ2p=zLtSa8fX6v1rPcYQ-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2017-10-19 9:16 ` Christoph Hellwig
2017-10-19 9:16 ` Christoph Hellwig
2017-10-19 9:16 ` Christoph Hellwig
2017-10-19 9:16 ` Christoph Hellwig
2017-10-19 22:47 ` Jim Quinlan
2017-10-19 22:47 ` Jim Quinlan
2017-10-19 22:47 ` Jim Quinlan
[not found] ` <CANCKTBuaTD29My77QfOeUmtZfLAmmJXUYe6QvBW+uoH2Kb+tAQ-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2017-10-20 7:37 ` Christoph Hellwig
2017-10-20 7:37 ` Christoph Hellwig
2017-10-20 7:37 ` Christoph Hellwig
2017-10-20 7:37 ` Christoph Hellwig
[not found] ` <20171020073730.GA12937-jcswGhMUV9g@public.gmane.org>
2017-10-20 14:41 ` Jim Quinlan
2017-10-20 14:41 ` Jim Quinlan
2017-10-20 14:41 ` Jim Quinlan
2017-10-20 14:41 ` Jim Quinlan
2017-10-20 14:57 ` Christoph Hellwig [this message]
2017-10-20 14:57 ` Christoph Hellwig
2017-10-20 14:57 ` Christoph Hellwig
2017-10-20 14:57 ` Christoph Hellwig
2017-10-20 15:27 ` Jim Quinlan
2017-10-20 15:27 ` Jim Quinlan
2017-10-20 15:27 ` Jim Quinlan
2017-10-20 16:17 ` Christoph Hellwig
2017-10-20 16:17 ` Christoph Hellwig
2017-10-20 16:17 ` Christoph Hellwig
2017-10-20 16:17 ` Christoph Hellwig
[not found] ` <CANCKTBtxp9gSdndKAZ7xGA+VozQsn2PX_-9P8A22_5Matbb7-w-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2017-10-23 9:06 ` David Laight
2017-10-23 9:06 ` David Laight
2017-10-23 9:06 ` David Laight
2017-10-23 9:06 ` David Laight
[not found] ` <063D6719AE5E284EB5DD2968C1650D6DD009F05A-VkEWCZq2GCInGFn1LkZF6NBPR1lH4CV8@public.gmane.org>
2017-10-24 18:08 ` Jim Quinlan
2017-10-24 18:08 ` Jim Quinlan
2017-10-24 18:08 ` Jim Quinlan
2017-10-24 18:08 ` Jim Quinlan
2017-10-25 9:36 ` David Laight
2017-10-25 9:36 ` David Laight
2017-10-25 9:36 ` David Laight
2017-10-25 9:36 ` David Laight
2017-10-11 22:34 ` [PATCH 6/9] PCI/MSI: Enable PCI_MSI_IRQ_DOMAIN support for MIPS Jim Quinlan
2017-10-11 22:34 ` Jim Quinlan
2017-10-11 22:34 ` [PATCH 7/9] PCI: host: brcmstb: add MSI capability Jim Quinlan
2017-10-11 22:34 ` Jim Quinlan
2017-10-11 22:34 ` [PATCH 8/9] MIPS: BMIPS: add PCI bindings for 7425, 7435 Jim Quinlan
2017-10-11 22:34 ` Jim Quinlan
2017-10-11 22:34 ` [PATCH 9/9] MIPS: BMIPS: enable PCI Jim Quinlan
2017-10-11 22:34 ` Jim Quinlan
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