* [PATCH] drm/i915: Empty the ring before disabling
@ 2017-10-26 23:56 Chris Wilson
2017-10-27 0:35 ` ✗ Fi.CI.BAT: failure for " Patchwork
` (2 more replies)
0 siblings, 3 replies; 6+ messages in thread
From: Chris Wilson @ 2017-10-26 23:56 UTC (permalink / raw)
To: intel-gfx
An interesting snippet from Sandybridge's prm:
"Although a Ring Buffer can be enabled in the non-empty state, it must
not be disabled unless it is empty. Attempting to disable a Ring Buffer
in the non-empty state is UNDEFINED."
Let's avoid the undefined behaviour as we disable the rings prior to
reset and resume.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com>
---
drivers/gpu/drm/i915/intel_ringbuffer.c | 4 +++-
drivers/gpu/drm/i915/intel_uncore.c | 4 +++-
2 files changed, 6 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
index 05e01446b00b..3f2073a9d37a 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.c
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
@@ -480,10 +480,12 @@ static bool stop_ring(struct intel_engine_cs *engine)
}
}
- I915_WRITE_CTL(engine, 0);
I915_WRITE_HEAD(engine, 0);
I915_WRITE_TAIL(engine, 0);
+ /* The ring must be empty before it is disabled */
+ I915_WRITE_CTL(engine, 0);
+
return (I915_READ_HEAD(engine) & HEAD_ADDR) == 0;
}
diff --git a/drivers/gpu/drm/i915/intel_uncore.c b/drivers/gpu/drm/i915/intel_uncore.c
index 20e3c65c0999..ac688ee6fe4e 100644
--- a/drivers/gpu/drm/i915/intel_uncore.c
+++ b/drivers/gpu/drm/i915/intel_uncore.c
@@ -1387,10 +1387,12 @@ static void gen3_stop_engine(struct intel_engine_cs *engine)
DRM_DEBUG_DRIVER("%s: timed out on STOP_RING\n",
engine->name);
- I915_WRITE_FW(RING_CTL(base), 0);
I915_WRITE_FW(RING_HEAD(base), 0);
I915_WRITE_FW(RING_TAIL(base), 0);
+ /* The ring must be empty before it is disabled */
+ I915_WRITE_FW(RING_CTL(base), 0);
+
/* Check acts as a post */
if (I915_READ_FW(RING_HEAD(base)) != 0)
DRM_DEBUG_DRIVER("%s: ring head not parked\n",
--
2.15.0.rc2
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^ permalink raw reply related [flat|nested] 6+ messages in thread* ✗ Fi.CI.BAT: failure for drm/i915: Empty the ring before disabling
2017-10-26 23:56 [PATCH] drm/i915: Empty the ring before disabling Chris Wilson
@ 2017-10-27 0:35 ` Patchwork
2017-10-27 6:44 ` [PATCH] " Mika Kuoppala
2017-10-27 11:27 ` Ville Syrjälä
2 siblings, 0 replies; 6+ messages in thread
From: Patchwork @ 2017-10-27 0:35 UTC (permalink / raw)
To: Chris Wilson; +Cc: intel-gfx
== Series Details ==
Series: drm/i915: Empty the ring before disabling
URL : https://patchwork.freedesktop.org/series/32727/
State : failure
== Summary ==
Series 32727v1 drm/i915: Empty the ring before disabling
https://patchwork.freedesktop.org/api/1.0/series/32727/revisions/1/mbox/
Test gem_exec_suspend:
Subgroup basic-s3:
pass -> DMESG-FAIL (fi-kbl-7560u) fdo#103039
Subgroup basic-s4-devices:
pass -> DMESG-FAIL (fi-kbl-7560u) fdo#102846 +1
Test gem_flink_basic:
Subgroup bad-flink:
pass -> DMESG-WARN (fi-kbl-7560u) fdo#103049 +4
Test kms_pipe_crc_basic:
Subgroup suspend-read-crc-pipe-b:
pass -> INCOMPLETE (fi-cnl-y)
fdo#103039 https://bugs.freedesktop.org/show_bug.cgi?id=103039
fdo#102846 https://bugs.freedesktop.org/show_bug.cgi?id=102846
fdo#103049 https://bugs.freedesktop.org/show_bug.cgi?id=103049
fi-bdw-5557u total:289 pass:268 dwarn:0 dfail:0 fail:0 skip:21 time:443s
fi-bdw-gvtdvm total:289 pass:265 dwarn:0 dfail:0 fail:0 skip:24 time:454s
fi-blb-e6850 total:289 pass:223 dwarn:1 dfail:0 fail:0 skip:65 time:376s
fi-bsw-n3050 total:289 pass:243 dwarn:0 dfail:0 fail:0 skip:46 time:531s
fi-bwr-2160 total:289 pass:183 dwarn:0 dfail:0 fail:0 skip:106 time:262s
fi-bxt-dsi total:289 pass:259 dwarn:0 dfail:0 fail:0 skip:30 time:498s
fi-bxt-j4205 total:289 pass:260 dwarn:0 dfail:0 fail:0 skip:29 time:495s
fi-byt-j1900 total:289 pass:253 dwarn:1 dfail:0 fail:0 skip:35 time:498s
fi-byt-n2820 total:289 pass:249 dwarn:1 dfail:0 fail:0 skip:39 time:489s
fi-cfl-s total:289 pass:253 dwarn:4 dfail:0 fail:0 skip:32 time:564s
fi-cnl-y total:246 pass:221 dwarn:0 dfail:0 fail:0 skip:24
fi-elk-e7500 total:289 pass:229 dwarn:0 dfail:0 fail:0 skip:60 time:417s
fi-gdg-551 total:289 pass:178 dwarn:1 dfail:0 fail:1 skip:109 time:251s
fi-glk-1 total:289 pass:261 dwarn:0 dfail:0 fail:0 skip:28 time:577s
fi-glk-dsi total:289 pass:258 dwarn:0 dfail:0 fail:1 skip:30 time:490s
fi-hsw-4770 total:289 pass:262 dwarn:0 dfail:0 fail:0 skip:27 time:430s
fi-hsw-4770r total:289 pass:262 dwarn:0 dfail:0 fail:0 skip:27 time:431s
fi-ilk-650 total:289 pass:228 dwarn:0 dfail:0 fail:0 skip:61 time:437s
fi-ivb-3520m total:289 pass:260 dwarn:0 dfail:0 fail:0 skip:29 time:498s
fi-ivb-3770 total:289 pass:260 dwarn:0 dfail:0 fail:0 skip:29 time:456s
fi-kbl-7500u total:289 pass:264 dwarn:1 dfail:0 fail:0 skip:24 time:490s
fi-kbl-7560u total:125 pass:105 dwarn:5 dfail:2 fail:0 skip:12
fi-kbl-7567u total:289 pass:269 dwarn:0 dfail:0 fail:0 skip:20 time:480s
fi-kbl-r total:289 pass:262 dwarn:0 dfail:0 fail:0 skip:27 time:588s
fi-pnv-d510 total:289 pass:222 dwarn:1 dfail:0 fail:0 skip:66 time:548s
fi-skl-6260u total:289 pass:269 dwarn:0 dfail:0 fail:0 skip:20 time:455s
fi-skl-6600u total:289 pass:262 dwarn:0 dfail:0 fail:0 skip:27 time:590s
fi-skl-6700hq total:289 pass:263 dwarn:0 dfail:0 fail:0 skip:26 time:648s
fi-skl-6700k total:289 pass:265 dwarn:0 dfail:0 fail:0 skip:24 time:520s
fi-skl-6770hq total:289 pass:269 dwarn:0 dfail:0 fail:0 skip:20 time:504s
fi-skl-gvtdvm total:289 pass:266 dwarn:0 dfail:0 fail:0 skip:23 time:460s
fi-snb-2520m total:289 pass:250 dwarn:0 dfail:0 fail:0 skip:39 time:562s
fi-snb-2600 total:289 pass:249 dwarn:0 dfail:0 fail:0 skip:40 time:419s
ab2f0644893988b173763303a96b7213315b8acf drm-tip: 2017y-10m-26d-22h-25m-08s UTC integration manifest
ebb78aa45a24 drm/i915: Empty the ring before disabling
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_6219/
_______________________________________________
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 6+ messages in thread* Re: [PATCH] drm/i915: Empty the ring before disabling
2017-10-26 23:56 [PATCH] drm/i915: Empty the ring before disabling Chris Wilson
2017-10-27 0:35 ` ✗ Fi.CI.BAT: failure for " Patchwork
@ 2017-10-27 6:44 ` Mika Kuoppala
2017-10-27 9:18 ` Chris Wilson
2017-10-27 11:27 ` Ville Syrjälä
2 siblings, 1 reply; 6+ messages in thread
From: Mika Kuoppala @ 2017-10-27 6:44 UTC (permalink / raw)
To: Chris Wilson, intel-gfx
Chris Wilson <chris@chris-wilson.co.uk> writes:
> An interesting snippet from Sandybridge's prm:
>
> "Although a Ring Buffer can be enabled in the non-empty state, it must
> not be disabled unless it is empty. Attempting to disable a Ring Buffer
> in the non-empty state is UNDEFINED."
>
> Let's avoid the undefined behaviour as we disable the rings prior to
> reset and resume.
>
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com>
> ---
> drivers/gpu/drm/i915/intel_ringbuffer.c | 4 +++-
> drivers/gpu/drm/i915/intel_uncore.c | 4 +++-
> 2 files changed, 6 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
> index 05e01446b00b..3f2073a9d37a 100644
> --- a/drivers/gpu/drm/i915/intel_ringbuffer.c
> +++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
> @@ -480,10 +480,12 @@ static bool stop_ring(struct intel_engine_cs *engine)
> }
> }
>
> - I915_WRITE_CTL(engine, 0);
> I915_WRITE_HEAD(engine, 0);
> I915_WRITE_TAIL(engine, 0);
>
> + /* The ring must be empty before it is disabled */
> + I915_WRITE_CTL(engine, 0);
> +
I am thinking that does it need even more finesse.
Like
I915_WRITE_HEAD(engine, I915_READ_TAIL(engine));
I915_WRITE_TAIL(engine, 0);
I915_WRITE_HEAD(engine, 0);
I915_WRITE_CTL(engine, 0);
Regardless, nice find and has the promise of making
those nasty resets on active rings more robust.
Reviewed-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>
> return (I915_READ_HEAD(engine) & HEAD_ADDR) == 0;
> }
>
> diff --git a/drivers/gpu/drm/i915/intel_uncore.c b/drivers/gpu/drm/i915/intel_uncore.c
> index 20e3c65c0999..ac688ee6fe4e 100644
> --- a/drivers/gpu/drm/i915/intel_uncore.c
> +++ b/drivers/gpu/drm/i915/intel_uncore.c
> @@ -1387,10 +1387,12 @@ static void gen3_stop_engine(struct intel_engine_cs *engine)
> DRM_DEBUG_DRIVER("%s: timed out on STOP_RING\n",
> engine->name);
>
> - I915_WRITE_FW(RING_CTL(base), 0);
> I915_WRITE_FW(RING_HEAD(base), 0);
> I915_WRITE_FW(RING_TAIL(base), 0);
>
> + /* The ring must be empty before it is disabled */
> + I915_WRITE_FW(RING_CTL(base), 0);
> +
> /* Check acts as a post */
> if (I915_READ_FW(RING_HEAD(base)) != 0)
> DRM_DEBUG_DRIVER("%s: ring head not parked\n",
> --
> 2.15.0.rc2
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 6+ messages in thread* Re: [PATCH] drm/i915: Empty the ring before disabling
2017-10-27 6:44 ` [PATCH] " Mika Kuoppala
@ 2017-10-27 9:18 ` Chris Wilson
0 siblings, 0 replies; 6+ messages in thread
From: Chris Wilson @ 2017-10-27 9:18 UTC (permalink / raw)
To: Mika Kuoppala, intel-gfx
Quoting Mika Kuoppala (2017-10-27 07:44:31)
> Chris Wilson <chris@chris-wilson.co.uk> writes:
>
> > An interesting snippet from Sandybridge's prm:
> >
> > "Although a Ring Buffer can be enabled in the non-empty state, it must
> > not be disabled unless it is empty. Attempting to disable a Ring Buffer
> > in the non-empty state is UNDEFINED."
> >
> > Let's avoid the undefined behaviour as we disable the rings prior to
> > reset and resume.
> >
> > Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> > Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com>
> > ---
> > drivers/gpu/drm/i915/intel_ringbuffer.c | 4 +++-
> > drivers/gpu/drm/i915/intel_uncore.c | 4 +++-
> > 2 files changed, 6 insertions(+), 2 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
> > index 05e01446b00b..3f2073a9d37a 100644
> > --- a/drivers/gpu/drm/i915/intel_ringbuffer.c
> > +++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
> > @@ -480,10 +480,12 @@ static bool stop_ring(struct intel_engine_cs *engine)
> > }
> > }
> >
> > - I915_WRITE_CTL(engine, 0);
> > I915_WRITE_HEAD(engine, 0);
> > I915_WRITE_TAIL(engine, 0);
> >
> > + /* The ring must be empty before it is disabled */
> > + I915_WRITE_CTL(engine, 0);
> > +
>
> I am thinking that does it need even more finesse.
I thought so too, but we already stop the ring, and so gave up thinking.
> Like
>
> I915_WRITE_HEAD(engine, I915_READ_TAIL(engine));
Nevertheless, I'll give that a spin since that's neat ;)
-Chris
_______________________________________________
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH] drm/i915: Empty the ring before disabling
2017-10-26 23:56 [PATCH] drm/i915: Empty the ring before disabling Chris Wilson
2017-10-27 0:35 ` ✗ Fi.CI.BAT: failure for " Patchwork
2017-10-27 6:44 ` [PATCH] " Mika Kuoppala
@ 2017-10-27 11:27 ` Ville Syrjälä
2017-10-27 11:35 ` Chris Wilson
2 siblings, 1 reply; 6+ messages in thread
From: Ville Syrjälä @ 2017-10-27 11:27 UTC (permalink / raw)
To: Chris Wilson; +Cc: intel-gfx
On Fri, Oct 27, 2017 at 12:56:39AM +0100, Chris Wilson wrote:
> An interesting snippet from Sandybridge's prm:
>
> "Although a Ring Buffer can be enabled in the non-empty state, it must
> not be disabled unless it is empty. Attempting to disable a Ring Buffer
> in the non-empty state is UNDEFINED."
However elsewhere it still says:
"Writing the Head Offset while the RB is enabled is UNDEFINED"
and
"It can be enabled or disabled regardless of whether there
are valid instructions pending."
And gen2/3 bspec says this:
"Ring buffers can be disabled with valid instructions pending.
When disabled, the ring buffer will be removed from command
stream arbitration at the next arbitration point (i.e.,
instruction boundary)."
>
> Let's avoid the undefined behaviour as we disable the rings prior to
> reset and resume.
>
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com>
> ---
> drivers/gpu/drm/i915/intel_ringbuffer.c | 4 +++-
> drivers/gpu/drm/i915/intel_uncore.c | 4 +++-
> 2 files changed, 6 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
> index 05e01446b00b..3f2073a9d37a 100644
> --- a/drivers/gpu/drm/i915/intel_ringbuffer.c
> +++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
> @@ -480,10 +480,12 @@ static bool stop_ring(struct intel_engine_cs *engine)
> }
> }
>
> - I915_WRITE_CTL(engine, 0);
> I915_WRITE_HEAD(engine, 0);
> I915_WRITE_TAIL(engine, 0);
>
> + /* The ring must be empty before it is disabled */
> + I915_WRITE_CTL(engine, 0);
> +
> return (I915_READ_HEAD(engine) & HEAD_ADDR) == 0;
> }
>
> diff --git a/drivers/gpu/drm/i915/intel_uncore.c b/drivers/gpu/drm/i915/intel_uncore.c
> index 20e3c65c0999..ac688ee6fe4e 100644
> --- a/drivers/gpu/drm/i915/intel_uncore.c
> +++ b/drivers/gpu/drm/i915/intel_uncore.c
> @@ -1387,10 +1387,12 @@ static void gen3_stop_engine(struct intel_engine_cs *engine)
> DRM_DEBUG_DRIVER("%s: timed out on STOP_RING\n",
> engine->name);
>
> - I915_WRITE_FW(RING_CTL(base), 0);
> I915_WRITE_FW(RING_HEAD(base), 0);
> I915_WRITE_FW(RING_TAIL(base), 0);
>
> + /* The ring must be empty before it is disabled */
> + I915_WRITE_FW(RING_CTL(base), 0);
> +
> /* Check acts as a post */
> if (I915_READ_FW(RING_HEAD(base)) != 0)
> DRM_DEBUG_DRIVER("%s: ring head not parked\n",
> --
> 2.15.0.rc2
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
--
Ville Syrjälä
Intel OTC
_______________________________________________
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 6+ messages in thread* Re: [PATCH] drm/i915: Empty the ring before disabling
2017-10-27 11:27 ` Ville Syrjälä
@ 2017-10-27 11:35 ` Chris Wilson
0 siblings, 0 replies; 6+ messages in thread
From: Chris Wilson @ 2017-10-27 11:35 UTC (permalink / raw)
To: Ville Syrjälä; +Cc: intel-gfx
Quoting Ville Syrjälä (2017-10-27 12:27:59)
> On Fri, Oct 27, 2017 at 12:56:39AM +0100, Chris Wilson wrote:
> > An interesting snippet from Sandybridge's prm:
> >
> > "Although a Ring Buffer can be enabled in the non-empty state, it must
> > not be disabled unless it is empty. Attempting to disable a Ring Buffer
> > in the non-empty state is UNDEFINED."
>
> However elsewhere it still says:
> "Writing the Head Offset while the RB is enabled is UNDEFINED"
> and
> "It can be enabled or disabled regardless of whether there
> are valid instructions pending."
Nothing like a catch 22. Let's just reset the GPU first...
-Chris
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 6+ messages in thread
end of thread, other threads:[~2017-10-27 11:35 UTC | newest]
Thread overview: 6+ messages (download: mbox.gz follow: Atom feed
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2017-10-26 23:56 [PATCH] drm/i915: Empty the ring before disabling Chris Wilson
2017-10-27 0:35 ` ✗ Fi.CI.BAT: failure for " Patchwork
2017-10-27 6:44 ` [PATCH] " Mika Kuoppala
2017-10-27 9:18 ` Chris Wilson
2017-10-27 11:27 ` Ville Syrjälä
2017-10-27 11:35 ` Chris Wilson
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