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[2001:4830:134:3::11]) by mx.google.com with ESMTPS id u6si2708450ybk.607.2017.11.06.12.13.54 for (version=TLS1 cipher=AES128-SHA bits=128/128); Mon, 06 Nov 2017 12:13:55 -0800 (PST) Received-SPF: pass (google.com: domain of qemu-arm-bounces+alex.bennee=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) client-ip=2001:4830:134:3::11; Authentication-Results: mx.google.com; dkim=fail header.i=@braap.org header.s=mesmtp header.b=ee2tGTjj; dkim=fail header.i=@messagingengine.com header.s=fm1 header.b=OWsSkSEC; spf=pass (google.com: domain of qemu-arm-bounces+alex.bennee=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) smtp.mailfrom=qemu-arm-bounces+alex.bennee=linaro.org@nongnu.org Received: from localhost ([::1]:50113 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1eBnmM-00023Z-ET for alex.bennee@linaro.org; Mon, 06 Nov 2017 15:13:54 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:46544) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1eBnm7-0001yl-P1 for qemu-arm@nongnu.org; Mon, 06 Nov 2017 15:13:40 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1eBnm4-00052K-HZ for qemu-arm@nongnu.org; Mon, 06 Nov 2017 15:13:39 -0500 Received: from out4-smtp.messagingengine.com ([66.111.4.28]:36705) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1eBnm4-00051K-4n; Mon, 06 Nov 2017 15:13:36 -0500 Received: from compute4.internal (compute4.nyi.internal [10.202.2.44]) by mailout.nyi.internal (Postfix) with ESMTP id 5B4B120D1F; Mon, 6 Nov 2017 15:13:33 -0500 (EST) Received: from frontend2 ([10.202.2.161]) by compute4.internal (MEProxy); Mon, 06 Nov 2017 15:13:33 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=braap.org; h=cc :content-type:date:from:in-reply-to:message-id:mime-version :references:subject:to:x-me-sender:x-me-sender:x-sasl-enc; s= mesmtp; bh=hpHLb5KJ09xsKPzv00vdilMG/C4sqCdvthnOJoOC+a8=; b=ee2tG TjjqW9fIS7lyCWIVs5HYlrGaD9vwTX8d1pO8SZnL1ELmeBErIzi7oJMv+pi1hPhA HVKmClGGSY0nzhzMJ8Rx1wa6Dw9j9OidvPMuEL4MH8oDKvrMDMuEHqBDDYrCAExj PsDX/DSBsNOTkDEFv8MoZVbx/9ZteSVlh5dmN4= DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d= messagingengine.com; h=cc:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to:x-me-sender :x-me-sender:x-sasl-enc; s=fm1; bh=hpHLb5KJ09xsKPzv00vdilMG/C4sq CdvthnOJoOC+a8=; b=OWsSkSECG7ZuRZChBNDhXBnD5L+HCBeo7Io1sWW+F4q7d AgC4jWhgvNPoEDmwMk08PB0ctrYejTEPOvNDSODa+1pddoos5OIUVXSvmTnaZ/Fq 7LsHQQdmnudaBJzxgXyzdPkzxzNxJXsHqgPPlZpPw9F5IEmMoAUwG9ixvplMFadc iUsCQDN47T7axzz2Zdte9mgHNuU7sgSL7YFWBz1u/fVQtHcjGIUEYRkEL0Lg6BHx O6vWNxW/HNZMWDBQDp9dHYNTZGcvJjsJGqxfslzD4zV96mwShcYdCqgcTquiEOdL WSjXD06A4wp2kMXL3AmJiK2YQRuAQhzbFACBFVqBg== X-ME-Sender: Received: from localhost (flamenco.cs.columbia.edu [128.59.20.216]) by mail.messagingengine.com (Postfix) with ESMTPA id 135F724E82; Mon, 6 Nov 2017 15:13:33 -0500 (EST) Date: Mon, 6 Nov 2017 15:13:32 -0500 From: "Emilio G. Cota" To: Eduardo Habkost Message-ID: <20171106201332.GA2152@flamenco> References: <1509734853-3014-1-git-send-email-cota@braap.org> <20171103185610.GA3907@flamenco> <20171103200233.GI3111@localhost.localdomain> <20171103222407.GA22411@flamenco> <20171106141022.GO3111@localhost.localdomain> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20171106141022.GO3111@localhost.localdomain> User-Agent: Mutt/1.5.24 (2015-08-30) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 66.111.4.28 Subject: Re: [Qemu-arm] [PATCH] hw: add .min_cpus and .default_cpus fields to machine_class X-BeenThere: qemu-arm@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , Thomas Huth , Igor Mitsyanko , Richard Henderson , qemu-devel@nongnu.org, Alistair Francis , qemu-arm@nongnu.org, Igor Mammedov , Marcel Apfelbaum Errors-To: qemu-arm-bounces+alex.bennee=linaro.org@nongnu.org Sender: "Qemu-arm" X-TUID: NgJkfchPLjhy On Mon, Nov 06, 2017 at 12:10:22 -0200, Eduardo Habkost wrote: > IMO, initialization state doesn't belong to CPUClass. We already > have a single accelerator object in MachineState::accelerator, > and tcg_initialized could be moved to a AccelState::initialized > field. I don't know how to cleanly get AccelState from a CPUClass pointer (as I said I'm not familiar with object code / qom) -- suggestions welcome! The best I could come up in the limited time I have for this is to use a static bool, as shown below. ---8<--- Subject: [PATCH] qom: move CPUClass.tcg_initialize to a global 55c3cee ("qom: Introduce CPUClass.tcg_initialize", 2017-10-24) introduces a per-CPUClass bool that we check so that the target CPU is initialized for TCG only once. This works well except when we end up creating more than one CPUClass, in which case we end up incorrectly initializing TCG more than once, i.e. once for each CPUClass. This can be replicated with: $ aarch64-softmmu/qemu-system-aarch64 -machine xlnx-zcu102 -smp 6 \ -global driver=xlnx,,zynqmp,property=has_rpu,value=on In this case the class name of the "RPUs" is prefixed by "cortex-r5-", whereas the "regular" CPUs are prefixed by "cortex-a53-". This results in two CPUClass instances being created. Fix it by introducing a static variable, so that only the first target CPU being initialized will initialize the target-dependent part of TCG, regardless of CPUClass instances. Fixes: 55c3ceef61fcf06fc98ddc752b7cce788ce7680b Signed-off-by: Emilio G. Cota --- exec.c | 5 +++-- include/qom/cpu.h | 1 - 2 files changed, 3 insertions(+), 3 deletions(-) diff --git a/exec.c b/exec.c index 97a24a8..8b579c0 100644 --- a/exec.c +++ b/exec.c @@ -792,11 +792,12 @@ void cpu_exec_initfn(CPUState *cpu) void cpu_exec_realizefn(CPUState *cpu, Error **errp) { CPUClass *cc = CPU_GET_CLASS(cpu); + static bool tcg_target_initialized; cpu_list_add(cpu); - if (tcg_enabled() && !cc->tcg_initialized) { - cc->tcg_initialized = true; + if (tcg_enabled() && !tcg_target_initialized) { + tcg_target_initialized = true; cc->tcg_initialize(); } diff --git a/include/qom/cpu.h b/include/qom/cpu.h index fa4b0c9..c2fa151 100644 --- a/include/qom/cpu.h +++ b/include/qom/cpu.h @@ -209,7 +209,6 @@ typedef struct CPUClass { /* Keep non-pointer data at the end to minimize holes. */ int gdb_num_core_regs; bool gdb_stop_before_watchpoint; - bool tcg_initialized; } CPUClass; #ifdef HOST_WORDS_BIGENDIAN -- 2.7.4 From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:46567) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1eBnmA-000202-8T for qemu-devel@nongnu.org; Mon, 06 Nov 2017 15:13:43 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1eBnm9-00053x-38 for qemu-devel@nongnu.org; Mon, 06 Nov 2017 15:13:42 -0500 Date: Mon, 6 Nov 2017 15:13:32 -0500 From: "Emilio G. Cota" Message-ID: <20171106201332.GA2152@flamenco> References: <1509734853-3014-1-git-send-email-cota@braap.org> <20171103185610.GA3907@flamenco> <20171103200233.GI3111@localhost.localdomain> <20171103222407.GA22411@flamenco> <20171106141022.GO3111@localhost.localdomain> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20171106141022.GO3111@localhost.localdomain> Subject: Re: [Qemu-devel] [PATCH] hw: add .min_cpus and .default_cpus fields to machine_class List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Eduardo Habkost Cc: qemu-devel@nongnu.org, Peter Maydell , Richard Henderson , Thomas Huth , qemu-arm@nongnu.org, Igor Mitsyanko , Alistair Francis , "Edgar E . Iglesias" , Marcel Apfelbaum , Igor Mammedov On Mon, Nov 06, 2017 at 12:10:22 -0200, Eduardo Habkost wrote: > IMO, initialization state doesn't belong to CPUClass. We already > have a single accelerator object in MachineState::accelerator, > and tcg_initialized could be moved to a AccelState::initialized > field. I don't know how to cleanly get AccelState from a CPUClass pointer (as I said I'm not familiar with object code / qom) -- suggestions welcome! The best I could come up in the limited time I have for this is to use a static bool, as shown below. ---8<--- Subject: [PATCH] qom: move CPUClass.tcg_initialize to a global 55c3cee ("qom: Introduce CPUClass.tcg_initialize", 2017-10-24) introduces a per-CPUClass bool that we check so that the target CPU is initialized for TCG only once. This works well except when we end up creating more than one CPUClass, in which case we end up incorrectly initializing TCG more than once, i.e. once for each CPUClass. This can be replicated with: $ aarch64-softmmu/qemu-system-aarch64 -machine xlnx-zcu102 -smp 6 \ -global driver=xlnx,,zynqmp,property=has_rpu,value=on In this case the class name of the "RPUs" is prefixed by "cortex-r5-", whereas the "regular" CPUs are prefixed by "cortex-a53-". This results in two CPUClass instances being created. Fix it by introducing a static variable, so that only the first target CPU being initialized will initialize the target-dependent part of TCG, regardless of CPUClass instances. Fixes: 55c3ceef61fcf06fc98ddc752b7cce788ce7680b Signed-off-by: Emilio G. Cota --- exec.c | 5 +++-- include/qom/cpu.h | 1 - 2 files changed, 3 insertions(+), 3 deletions(-) diff --git a/exec.c b/exec.c index 97a24a8..8b579c0 100644 --- a/exec.c +++ b/exec.c @@ -792,11 +792,12 @@ void cpu_exec_initfn(CPUState *cpu) void cpu_exec_realizefn(CPUState *cpu, Error **errp) { CPUClass *cc = CPU_GET_CLASS(cpu); + static bool tcg_target_initialized; cpu_list_add(cpu); - if (tcg_enabled() && !cc->tcg_initialized) { - cc->tcg_initialized = true; + if (tcg_enabled() && !tcg_target_initialized) { + tcg_target_initialized = true; cc->tcg_initialize(); } diff --git a/include/qom/cpu.h b/include/qom/cpu.h index fa4b0c9..c2fa151 100644 --- a/include/qom/cpu.h +++ b/include/qom/cpu.h @@ -209,7 +209,6 @@ typedef struct CPUClass { /* Keep non-pointer data at the end to minimize holes. */ int gdb_num_core_regs; bool gdb_stop_before_watchpoint; - bool tcg_initialized; } CPUClass; #ifdef HOST_WORDS_BIGENDIAN -- 2.7.4