From: Arnaldo Carvalho de Melo <acme@kernel.org>
To: Andi Kleen <andi@firstfloor.org>
Cc: "Vince Weaver" <vincent.weaver@maine.edu>,
"Peter Zijlstra" <peterz@infradead.org>,
"Jan Pokorný" <poki@redhat.com>,
linux-perf-users@vger.kernel.org
Subject: Re: perf utility question: "Sky high iTLB-load-misses"
Date: Thu, 9 Nov 2017 10:53:25 -0300 [thread overview]
Message-ID: <20171109135325.GJ4333@kernel.org> (raw)
In-Reply-To: <alpine.DEB.2.20.1711081152280.1975@macbook-air>
Em Wed, Nov 08, 2017 at 11:55:02AM -0500, Vince Weaver escreveu:
> On Wed, 8 Nov 2017, Jan Pokorný wrote:
>
> > Is iTLB-load-misses > 100% reported because of some deficiency
> > of the platform, a bug in perf, or an expected behaviour?
>
> If you look into the kernel, the two events being measured are
> [ C(RESULT_ACCESS) ] = 0x2085, /* ITLB_MISSES.STLB_HIT */
> [ C(RESULT_MISS) ] = 0xe85, /* ITLB_MISSES.WALK_COMPLETED */
>
> If you look this up in Intel Vol3b you can see that the "access" metric
> measures First level ITLB misses that hit in the Second-level TLB
>
> Wheras the miss metric is a list of accesses from any level that caused a
> walk of the page tables.
>
> So the events don't necessarily sound like they match up very well, so
> it's beleivable you will get odd results when trying to calculate
> percentages based on them.
Andi, is this something you can help in figuring out a fix? Peter?
- Arnaldo
next prev parent reply other threads:[~2017-11-09 13:53 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-11-08 16:34 perf utility question: "Sky high iTLB-load-misses" Jan Pokorný
2017-11-08 16:55 ` Vince Weaver
2017-11-09 13:53 ` Arnaldo Carvalho de Melo [this message]
2017-11-09 14:38 ` Andi Kleen
2017-11-09 18:50 ` Jan Pokorný
2017-11-09 19:12 ` Bram Stolk
2017-11-09 19:37 ` Vince Weaver
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