From: Cornelia Huck <cohuck@redhat.com>
To: Pierre Morel <pmorel@linux.vnet.ibm.com>
Cc: qemu-devel@nongnu.org, agraf@suse.de, borntraeger@de.ibm.com,
zyimin@linux.vnet.ibm.com, pasic@linux.vnet.ibm.com
Subject: Re: [Qemu-devel] [PATCH v2 4/7] s390x/pci: rework PCI STORE BLOCK
Date: Tue, 21 Nov 2017 11:42:43 +0100 [thread overview]
Message-ID: <20171121114243.7ac15767.cohuck@redhat.com> (raw)
In-Reply-To: <1510854715-7081-5-git-send-email-pmorel@linux.vnet.ibm.com>
On Thu, 16 Nov 2017 18:51:52 +0100
Pierre Morel <pmorel@linux.vnet.ibm.com> wrote:
> Enhance the fault detection.
>
> Fixup the precedence to check the destination path existance
> before checking for the source accessibility.
>
> Add the maxstbl entry to both the Query PCI Function Group
> response and the PCIBusDevice structure.
>
> Initialize the maxstbl to 128 per default until we get
> the actual data from the hardware.
>
> Signed-off-by: Pierre Morel <pmorel@linux.vnet.ibm.com>
> Reviewed-by: Yi Min Zhao <zyimin@linux.vnet.ibm.com>
> ---
> hw/s390x/s390-pci-bus.h | 1 +
> hw/s390x/s390-pci-inst.c | 62 +++++++++++++++++++++++++++++-------------------
> hw/s390x/s390-pci-inst.h | 2 +-
> 3 files changed, 40 insertions(+), 25 deletions(-)
> @@ -700,8 +685,33 @@ int pcistb_service_call(S390CPU *cpu, uint8_t r1, uint8_t r3, uint64_t gaddr,
> break;
> }
>
> + if (pcias > 5) {
> + DPRINTF("pcistb invalid space\n");
> + setcc(cpu, ZPCI_PCI_LS_ERR);
> + s390_set_status_code(env, r1, ZPCI_PCI_ST_INVAL_AS);
> + return 0;
> + }
> +
> + /* Verify the address, offset and length */
> + /* offset must be a multiple of 8 */
> + if (offset % 8) {
> + goto addressing_error;
> + }
> + /* Length must be greater than 8, a multiple of 8, not greater maxstbl */
"not greater than maxstlb"
> + if ((len <= 8) || (len % 8) || (len > pbdev->maxstbl)) {
> + goto addressing_error;
> + }
> + /* Do not cross a 4K-byte boundary */
> + if (((offset & 0xfff) + len) > 0x1000) {
> + goto addressing_error;
> + }
> + /* Guest address must be double word aligned */
> + if (gaddr & 0x07UL) {
> + goto addressing_error;
> + }
> +
> mr = pbdev->pdev->io_regions[pcias].memory;
> - if (!memory_region_access_valid(mr, env->regs[r3], len, true)) {
> + if (!memory_region_access_valid(mr, offset, len, true)) {
> program_interrupt(env, PGM_OPERAND, 6);
> return 0;
> }
Looks good.
next prev parent reply other threads:[~2017-11-21 10:42 UTC|newest]
Thread overview: 27+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-11-16 17:51 [Qemu-devel] [PATCH v2 0/7] s390x/pci: Improve zPCI to cover more cases Pierre Morel
2017-11-16 17:51 ` [Qemu-devel] [PATCH v2 1/7] s390x/pci: factor out endianess conversion Pierre Morel
2017-11-21 10:35 ` Cornelia Huck
2017-11-21 17:41 ` Pierre Morel
2017-11-16 17:51 ` [Qemu-devel] [PATCH v2 2/7] s390x/pci: rework PCI STORE Pierre Morel
2017-11-21 10:38 ` Cornelia Huck
2017-11-21 14:25 ` Cornelia Huck
2017-11-21 18:03 ` Pierre Morel
2017-11-22 13:25 ` Cornelia Huck
2017-11-22 21:12 ` Pierre Morel
2017-11-21 17:52 ` Pierre Morel
2017-11-16 17:51 ` [Qemu-devel] [PATCH v2 3/7] s390x/pci: rework PCI LOAD Pierre Morel
2017-11-21 10:39 ` Cornelia Huck
2017-11-16 17:51 ` [Qemu-devel] [PATCH v2 4/7] s390x/pci: rework PCI STORE BLOCK Pierre Morel
2017-11-21 10:42 ` Cornelia Huck [this message]
2017-11-21 18:07 ` Pierre Morel
2017-11-22 5:15 ` Yi Min Zhao
2017-11-22 13:28 ` Cornelia Huck
2017-11-22 20:37 ` Pierre Morel
2017-11-16 17:51 ` [Qemu-devel] [PATCH v2 5/7] s390x/pci: move the memory region read from pcilg Pierre Morel
2017-11-21 10:48 ` Cornelia Huck
2017-11-16 17:51 ` [Qemu-devel] [PATCH v2 6/7] s390x/pci: move the memory region write from pcistg Pierre Morel
2017-11-21 10:49 ` Cornelia Huck
2017-11-16 17:51 ` [Qemu-devel] [PATCH v2 7/7] s390x/pci: search for subregion inside the BARs Pierre Morel
2017-11-21 10:51 ` Cornelia Huck
2017-11-21 10:52 ` [Qemu-devel] [PATCH v2 0/7] s390x/pci: Improve zPCI to cover more cases Cornelia Huck
2017-11-21 18:10 ` Pierre Morel
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